luke
/
iverilog
mirror of https://github.com/steveicarus/iverilog.git
1
0
Fork 0
Code Issues Packages Projects Releases Wiki Activity

pform_set_range(): Pass full vector_type_t as argument 

Now that pform_set_range() is only used for vector types pass the
vector_type_t as an argument rather than deconstructing the type into range
and signedness.

Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
This commit is contained in:
Lars-Peter Clausen 2022-04-21 10:28:44 +02:00
parent 62b1f44104
commit d3be19081f
1 changed files with 12 additions and 17 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

29
pform.cc
View File

@ -2143,16 +2143,19 @@ void pform_make_udp(const struct vlltype&loc, perm_string name,
* and the name that I receive only has the tail component. * and the name that I receive only has the tail component.
*/ */
static void pform_set_net_range(PWire *wire, static void pform_set_net_range(PWire *wire,
const list<pform_range_t>*range, const vector_type_t *vec_type,
bool signed_flag,
PWSRType rt = SR_NET, PWSRType rt = SR_NET,
std::list<named_pexpr_t>*attr = 0) std::list<named_pexpr_t>*attr = 0)
{ {
pform_bind_attributes(wire->attributes, attr, true);
if (!vec_type)
return;
list<pform_range_t> *range = vec_type->pdims.get();
if (range) if (range)
wire->set_range(*range, rt); wire->set_range(*range, rt);
wire->set_signed(signed_flag); wire->set_signed(vec_type->signed_flag);
pform_bind_attributes(wire->attributes, attr, true);
} }
/* /*
@ -3235,15 +3238,7 @@ void pform_set_port_type(const struct vlltype&li,
{ {
assert(pt != NetNet::PIMPLICIT && pt != NetNet::NOT_A_PORT); assert(pt != NetNet::PIMPLICIT && pt != NetNet::NOT_A_PORT);
list<pform_range_t>*range = 0; vector_type_t *vt = dynamic_cast<vector_type_t*> (dt);
bool signed_flag = false;
if (vector_type_t*vt = dynamic_cast<vector_type_t*> (dt)) {
assert(vt->implicit_flag);
range = vt->pdims.get();
signed_flag = vt->signed_flag;
} else {
assert(dt == 0);
}
bool have_init_expr = false; bool have_init_expr = false;
for (list<pform_port_t>::iterator cur = ports->begin() for (list<pform_port_t>::iterator cur = ports->begin()
@ -3251,7 +3246,8 @@ void pform_set_port_type(const struct vlltype&li,
PWire *wire = pform_get_or_make_wire(li, cur->name, NetNet::IMPLICIT, pt, PWire *wire = pform_get_or_make_wire(li, cur->name, NetNet::IMPLICIT, pt,
IVL_VT_NO_TYPE, SR_PORT); IVL_VT_NO_TYPE, SR_PORT);
pform_set_net_range(wire, range, signed_flag, SR_PORT, attr); pform_set_net_range(wire, vt, SR_PORT, attr);
if (cur->udims) { if (cur->udims) {
cerr << li << ": warning: " cerr << li << ": warning: "
<< "Array dimensions in incomplete port declarations " << "Array dimensions in incomplete port declarations "
@ -3318,8 +3314,7 @@ void pform_set_data_type(const struct vlltype&li, data_type_t*data_type,
it != wires->end() ; ++it) { it != wires->end() ; ++it) {
PWire *wire = *it; PWire *wire = *it;
if (vec_type) pform_set_net_range(wire, vec_type);
pform_set_net_range(wire, vec_type->pdims.get(), vec_type->signed_flag);
// If these fail there is a bug somewhere else. pform_set_data_type() // If these fail there is a bug somewhere else. pform_set_data_type()
// is only ever called on a fresh wire that already exists. // is only ever called on a fresh wire that already exists.