Fix r-value width of continuous assign.
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ffedf32476
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elaborate.cc
18
elaborate.cc
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@ -17,7 +17,7 @@
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* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
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* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
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*/
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*/
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#ifdef HAVE_CVS_IDENT
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#ifdef HAVE_CVS_IDENT
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#ident "$Id: elaborate.cc,v 1.309 2004/12/11 02:31:25 steve Exp $"
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#ident "$Id: elaborate.cc,v 1.310 2004/12/12 18:13:39 steve Exp $"
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#endif
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#endif
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# include "config.h"
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# include "config.h"
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@ -1692,8 +1692,8 @@ NetProc* PCallTask::elaborate_usr(Design*des, NetScope*scope) const
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}
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}
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/*
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/*
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* Elaborate a proceedural continuous assign. This really looks very
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* Elaborate a procedural continuous assign. This really looks very
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* much like other prodeedural assignments, at this point, but there
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* much like other procedural assignments, at this point, but there
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* is no delay to worry about. The code generator will take care of
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* is no delay to worry about. The code generator will take care of
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* the differences between continuous assign and normal assignments.
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* the differences between continuous assign and normal assignments.
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*/
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*/
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@ -1710,11 +1710,16 @@ NetCAssign* PCAssign::elaborate(Design*des, NetScope*scope) const
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if (rexp == 0)
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if (rexp == 0)
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return 0;
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return 0;
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unsigned lwid = count_lval_width(lval);
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rexp->set_width(lwid);
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rexp = pad_to_width(rexp, lwid);
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dev = new NetCAssign(lval, rexp);
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dev = new NetCAssign(lval, rexp);
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if (debug_elaborate) {
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if (debug_elaborate) {
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cerr << get_line() << ": debug: ELaborate cassign,"
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cerr << get_line() << ": debug: Elaborate cassign,"
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<< " lval width=" << lval->lwidth()
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<< " lval width=" << lwid
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<< " rval width=" << rexp->expr_width()
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<< " rval width=" << rexp->expr_width()
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<< " rval=" << *rexp
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<< " rval=" << *rexp
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<< endl;
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<< endl;
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@ -2757,6 +2762,9 @@ Design* elaborate(list<perm_string>roots)
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/*
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/*
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* $Log: elaborate.cc,v $
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* $Log: elaborate.cc,v $
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* Revision 1.310 2004/12/12 18:13:39 steve
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* Fix r-value width of continuous assign.
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*
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* Revision 1.309 2004/12/11 02:31:25 steve
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* Revision 1.309 2004/12/11 02:31:25 steve
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* Rework of internals to carry vectors through nexus instead
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* Rework of internals to carry vectors through nexus instead
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* of single bits. Make the ivl, tgt-vvp and vvp initial changes
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* of single bits. Make the ivl, tgt-vvp and vvp initial changes
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