For div/mod only sign extend if both arguments are signed.
Only sign extend the operands for division or modulus if both of them are signed. Previously only the individual operand signedness was being considered.
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commit
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12
elab_expr.cc
12
elab_expr.cc
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@ -419,10 +419,8 @@ NetExpr* PEBinary::elaborate_expr_base_bits_(Design*des,
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// If either of the arguments is unsigned, then process both
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// of them as unsigned. This only impacts the padding that is
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// done to get the operands to the expr_wid.
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if (! lp->has_sign())
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rp->cast_signed(false);
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if (! rp->has_sign())
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lp->cast_signed(false);
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if (! lp->has_sign()) rp->cast_signed(false);
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if (! rp->has_sign()) lp->cast_signed(false);
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if (expr_wid > 0) {
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if (type_is_vectorable(lp->expr_type()))
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@ -453,6 +451,12 @@ NetExpr* PEBinary::elaborate_expr_base_div_(Design*des,
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}
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}
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// If either of the arguments is unsigned, then process both
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// of them as unsigned. This only impacts the padding that is
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// done to get the operands to the expr_wid.
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if (! lp->has_sign()) rp->cast_signed(false);
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if (! rp->has_sign()) lp->cast_signed(false);
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/* The original elaboration of the left and right expressions
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already tried to elaborate to the expr_wid. If the
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expressions are not that width by now, then they need to be
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