luke
/
iverilog
mirror of https://github.com/steveicarus/iverilog.git
1
0
Fork 0
Code Issues Packages Projects Releases Wiki Activity

vvp: vthread: Use word wide vector operations 

The vthread binary logic opcodes update vectors bit by bit.

Use the in-place `vvp_vector4_t` operators instead. This reuses the word
wide implementation and avoids per-bit `value()` and `set_bit()` calls.

Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
This commit is contained in:
Lars-Peter Clausen 2024-01-07 18:45:41 -08:00
parent 41c3423209
commit cf53479ba2
1 changed files with 7 additions and 26 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

33
vvp/vthread.cc
View File

@ -4491,13 +4491,9 @@ bool of_NAND(vthread_t thr, vvp_code_t)
vvp_vector4_t valr = thr->pop_vec4();
vvp_vector4_t&vall = thr->peek_vec4();
assert(vall.size() == valr.size());
unsigned wid = vall.size();
for (unsigned idx = 0 ; idx < wid ; idx += 1) {
vvp_bit4_t lb = vall.value(idx);
vvp_bit4_t rb = valr.value(idx);
vall.set_bit(idx, ~(lb&rb));
}
vall &= valr;
vall.invert();
return true;
}
@ -4755,13 +4751,9 @@ bool of_NOR(vthread_t thr, vvp_code_t)
vvp_vector4_t valr = thr->pop_vec4();
vvp_vector4_t&vall = thr->peek_vec4();
assert(vall.size() == valr.size());
unsigned wid = vall.size();
for (unsigned idx = 0 ; idx < wid ; idx += 1) {
vvp_bit4_t lb = vall.value(idx);
vvp_bit4_t rb = valr.value(idx);
vall.set_bit(idx, ~(lb|rb));
}
vall |= valr;
vall.invert();
return true;
}
@ -6564,14 +6556,9 @@ bool of_XNOR(vthread_t thr, vvp_code_t)
vvp_vector4_t valr = thr->pop_vec4();
vvp_vector4_t&vall = thr->peek_vec4();
assert(vall.size() == valr.size());
unsigned wid = vall.size();
for (unsigned idx = 0 ; idx < wid ; idx += 1) {
vvp_bit4_t lb = vall.value(idx);
vvp_bit4_t rb = valr.value(idx);
vall.set_bit(idx, ~(lb ^ rb));
}
vall ^= valr;
vall.invert();
return true;
}
@ -6584,14 +6571,8 @@ bool of_XOR(vthread_t thr, vvp_code_t)
vvp_vector4_t valr = thr->pop_vec4();
vvp_vector4_t&vall = thr->peek_vec4();
assert(vall.size() == valr.size());
unsigned wid = vall.size();
for (unsigned idx = 0 ; idx < wid ; idx += 1) {
vvp_bit4_t lb = vall.value(idx);
vvp_bit4_t rb = valr.value(idx);
vall.set_bit(idx, lb ^ rb);
}
vall ^= valr;
return true;
}