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Fix some space issues.

This commit is contained in:
Cary R 2011-09-01 14:32:07 -07:00 committed by Stephen Williams
parent b2ebc29c5a
commit ca6af1c20d
2 changed files with 4 additions and 4 deletions
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6
tgt-vvp/eval_real.c
View File

@ -1,5 +1,5 @@
/*
* Copyright (c) 2003-2010 Stephen Williams (steve@icarus.com)
* Copyright (c) 2003-2011 Stephen Williams (steve@icarus.com)
*
* This source code is free software; you can redistribute it
* and/or modify it in source code form under the terms of the GNU
@ -457,7 +457,7 @@ static int increment(ivl_expr_t e, int s, bool pre)
fprintf(vvp_out, " %%loadi/wr %d, 1, 0x1000; load 1.0\n", one);
if (!pre) {
/*
/*
* post-increment must return the non-incremented value.
* Therefore, copy the current value in a new word and return
* it.
@ -496,7 +496,7 @@ static int decrement(ivl_expr_t e, int s, bool pre)
fprintf(vvp_out, " %%loadi/wr %d, 1, 0x1000; load 1.0\n", one);
if (!pre) {
/*
/*
* post-decrement must return the non-incremented value.
* Therefore, copy the current value in a new word and return
* it.

2
vhdlpp/README.txt
View File

@ -47,6 +47,6 @@ in your VHDL code, access packages like this:
use bar.test3.all;
The *.pkg files are just VHDL code containing only the package with
the same name. When Icarus Verilog encounters the "use <lib>.<name>.*;"
the same name. When Icarus Verilog encounters the "use <lib>.<name>.*;"
statement, it looks for the <name>.pkg file in the <lib> library and
parses that file to get the package header declared therin.