Update %div instruction to vec4 version.
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aee540d8bb
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c897ca017c
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@ -145,8 +145,8 @@ static const struct opcode_table_s opcode_table[] = {
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{ "%delayx", of_DELAYX, 1, {OA_NUMBER, OA_NONE, OA_NONE} },
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{ "%delete/obj",of_DELETE_OBJ,1,{OA_FUNC_PTR,OA_NONE, OA_NONE} },
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{ "%disable/fork",of_DISABLE_FORK,0,{OA_NONE,OA_NONE, OA_NONE} },
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{ "%div", of_DIV, 3, {OA_BIT1, OA_BIT2, OA_NUMBER} },
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{ "%div/s", of_DIV_S, 3, {OA_BIT1, OA_BIT2, OA_NUMBER} },
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{ "%div", of_DIV, 0, {OA_NONE, OA_NONE, OA_NONE} },
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{ "%div/s", of_DIV_S, 0, {OA_NONE, OA_NONE, OA_NONE} },
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{ "%div/wr", of_DIV_WR, 0, {OA_NONE, OA_NONE, OA_NONE} },
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{ "%dup/real", of_DUP_REAL,0, {OA_NONE, OA_NONE, OA_NONE} },
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{ "%dup/vec4", of_DUP_VEC4,0, {OA_NONE, OA_NONE, OA_NONE} },
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@ -200,7 +200,7 @@ static const struct opcode_table_s opcode_table[] = {
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{ "%load/x1p",of_LOAD_X1P,3,{OA_BIT1, OA_FUNC_PTR, OA_BIT2} },
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{ "%max/wr", of_MAX_WR, 0, {OA_NONE, OA_NONE, OA_NONE} },
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{ "%min/wr", of_MIN_WR, 0, {OA_NONE, OA_NONE, OA_NONE} },
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{ "%mod", of_MOD, 3, {OA_BIT1, OA_BIT2, OA_NUMBER} },
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{ "%mod", of_MOD, 0, {OA_NONE, OA_NONE, OA_NONE} },
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{ "%mod/s", of_MOD_S, 0, {OA_NONE, OA_NONE, OA_NONE} },
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{ "%mod/wr", of_MOD_WR, 0, {OA_NONE, OA_NONE, OA_NONE} },
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{ "%mov", of_MOV, 3, {OA_BIT1, OA_BIT2, OA_NUMBER} },
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110
vvp/vthread.cc
110
vvp/vthread.cc
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@ -2619,27 +2619,29 @@ static unsigned long* divide_bits(unsigned long*ap, unsigned long*bp, unsigned w
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return result;
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}
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bool of_DIV(vthread_t thr, vvp_code_t cp)
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/*
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* %div
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*/
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bool of_DIV(vthread_t thr, vvp_code_t)
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{
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#if 0
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unsigned adra = cp->bit_idx[0];
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unsigned adrb = cp->bit_idx[1];
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unsigned wid = cp->number;
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vvp_vector4_t valb = thr->pop_vec4();
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vvp_vector4_t vala = thr->pop_vec4();
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assert(adra >= 4);
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assert(vala.size()== valb.size());
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unsigned wid = vala.size();
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unsigned long*ap = vector_to_array(thr, adra, wid);
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unsigned long*ap = vala.subarray(0, wid);
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if (ap == 0) {
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vvp_vector4_t tmp(wid, BIT4_X);
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thr->bits4.set_vec(adra, tmp);
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thr->push_vec4(tmp);
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return true;
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}
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unsigned long*bp = vector_to_array(thr, adrb, wid);
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unsigned long*bp = valb.subarray(0, wid);
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if (bp == 0) {
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delete[]ap;
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vvp_vector4_t tmp(wid, BIT4_X);
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thr->bits4.set_vec(adra, tmp);
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thr->push_vec4(tmp);
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return true;
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}
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@ -2647,10 +2649,11 @@ bool of_DIV(vthread_t thr, vvp_code_t cp)
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if (wid <= CPU_WORD_BITS) {
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if (bp[0] == 0) {
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vvp_vector4_t tmp(wid, BIT4_X);
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thr->bits4.set_vec(adra, tmp);
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thr->push_vec4(tmp);
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} else {
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ap[0] /= bp[0];
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thr->bits4.setarray(adra, wid, ap);
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vala.setarray(0, wid, ap);
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thr->push_vec4(vala);
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}
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delete[]ap;
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delete[]bp;
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@ -2662,7 +2665,7 @@ bool of_DIV(vthread_t thr, vvp_code_t cp)
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delete[]ap;
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delete[]bp;
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vvp_vector4_t tmp(wid, BIT4_X);
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thr->bits4.set_vec(adra, tmp);
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thr->push_vec4(tmp);
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return true;
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}
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@ -2670,13 +2673,12 @@ bool of_DIV(vthread_t thr, vvp_code_t cp)
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// desired result. We should find that:
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// input-a = bp * result + ap;
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thr->bits4.setarray(adra, wid, result);
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vala.setarray(0, wid, result);
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thr->push_vec4(vala);
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delete[]ap;
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delete[]bp;
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delete[]result;
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#else
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fprintf(stderr, "XXXX NOT IMPLEMENTED: %%div ...\n");
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#endif
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return true;
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}
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@ -2688,31 +2690,33 @@ static void negate_words(unsigned long*val, unsigned words)
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val[idx] = add_with_carry(0, ~val[idx], carry);
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}
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bool of_DIV_S(vthread_t thr, vvp_code_t cp)
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/*
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* %div/s
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*/
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bool of_DIV_S(vthread_t thr, vvp_code_t)
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{
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#if 0
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unsigned adra = cp->bit_idx[0];
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unsigned adrb = cp->bit_idx[1];
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unsigned wid = cp->number;
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unsigned words = (wid + CPU_WORD_BITS - 1) / CPU_WORD_BITS;
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vvp_vector4_t valb = thr->pop_vec4();
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vvp_vector4_t vala = thr->pop_vec4();
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assert(adra >= 4);
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assert(vala.size()== valb.size());
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unsigned wid = vala.size();
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unsigned words = (wid + CPU_WORD_BITS - 1) / CPU_WORD_BITS;
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// Get the values, left in right, in binary form. If there is
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// a problem with either (caused by an X or Z bit) then we
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// know right away that the entire result is X.
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unsigned long*ap = vector_to_array(thr, adra, wid);
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unsigned long*ap = vala.subarray(0, wid);
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if (ap == 0) {
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vvp_vector4_t tmp(wid, BIT4_X);
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thr->bits4.set_vec(adra, tmp);
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thr->push_vec4(tmp);
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return true;
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}
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unsigned long*bp = vector_to_array(thr, adrb, wid);
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unsigned long*bp = valb.subarray(0, wid);
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if (bp == 0) {
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delete[]ap;
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vvp_vector4_t tmp(wid, BIT4_X);
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thr->bits4.set_vec(adra, tmp);
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thr->push_vec4(tmp);
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return true;
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}
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@ -2730,13 +2734,14 @@ bool of_DIV_S(vthread_t thr, vvp_code_t cp)
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if (wid <= CPU_WORD_BITS) {
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if (bp[0] == 0) {
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vvp_vector4_t tmp(wid, BIT4_X);
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thr->bits4.set_vec(adra, tmp);
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thr->push_vec4(tmp);
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} else {
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long tmpa = (long) ap[0];
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long tmpb = (long) bp[0];
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long res = tmpa / tmpb;
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ap[0] = ((unsigned long)res) & ~sign_mask;
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thr->bits4.setarray(adra, wid, ap);
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vala.setarray(0, wid, ap);
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thr->push_vec4(vala);
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}
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delete[]ap;
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delete[]bp;
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@ -2760,7 +2765,7 @@ bool of_DIV_S(vthread_t thr, vvp_code_t cp)
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delete[]ap;
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delete[]bp;
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vvp_vector4_t tmp(wid, BIT4_X);
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thr->bits4.set_vec(adra, tmp);
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thr->push_vec4(tmp);
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return true;
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}
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@ -2770,13 +2775,11 @@ bool of_DIV_S(vthread_t thr, vvp_code_t cp)
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result[words-1] &= ~sign_mask;
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thr->bits4.setarray(adra, wid, result);
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vala.setarray(0, wid, result);
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thr->push_vec4(vala);
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delete[]ap;
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delete[]bp;
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delete[]result;
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#else
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fprintf(stderr, "XXXX NOT IMPLEMENTED: %%div/s ...\n");
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#endif
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return true;
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}
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@ -4148,29 +4151,26 @@ bool of_MIN_WR(vthread_t thr, vvp_code_t)
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return true;
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}
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bool of_MOD(vthread_t thr, vvp_code_t cp)
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bool of_MOD(vthread_t thr, vvp_code_t)
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{
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#if 0
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assert(cp->bit_idx[0] >= 4);
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vvp_vector4_t valb = thr->pop_vec4();
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vvp_vector4_t vala = thr->pop_vec4();
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if(cp->number <= 8*sizeof(unsigned long long)) {
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unsigned idx1 = cp->bit_idx[0];
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unsigned idx2 = cp->bit_idx[1];
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assert(vala.size()==valb.size());
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unsigned wid = vala.size();
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if(wid <= 8*sizeof(unsigned long long)) {
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unsigned long long lv = 0, rv = 0;
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for (unsigned idx = 0 ; idx < cp->number ; idx += 1) {
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unsigned long long lb = thr_get_bit(thr, idx1);
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unsigned long long rb = thr_get_bit(thr, idx2);
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for (unsigned idx = 0 ; idx < wid ; idx += 1) {
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unsigned long long lb = vala.value(idx);
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unsigned long long rb = valb.value(idx);
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if ((lb | rb) & 2)
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goto x_out;
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lv |= (unsigned long long) lb << idx;
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rv |= (unsigned long long) rb << idx;
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idx1 += 1;
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if (idx2 >= 4)
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idx2 += 1;
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}
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if (rv == 0)
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@ -4178,24 +4178,22 @@ bool of_MOD(vthread_t thr, vvp_code_t cp)
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lv %= rv;
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for (unsigned idx = 0 ; idx < cp->number ; idx += 1) {
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thr_put_bit(thr, cp->bit_idx[0]+idx, (lv&1)?BIT4_1 : BIT4_0);
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for (unsigned idx = 0 ; idx < wid ; idx += 1) {
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vala.set_bit(idx, (lv&1)?BIT4_1 : BIT4_0);
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lv >>= 1;
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}
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thr->push_vec4(vala);
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return true;
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} else {
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do_verylong_mod(thr, cp, false, false);
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do_verylong_mod(thr, vala, valb, false, false);
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return true;
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}
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x_out:
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for (unsigned idx = 0 ; idx < cp->number ; idx += 1)
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thr_put_bit(thr, cp->bit_idx[0]+idx, BIT4_X);
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#else
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fprintf(stderr, "XXXX NOT IMPLEMENTED: %%mod ...\n");
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#endif
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vvp_vector4_t tmp (wid, BIT4_X);
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thr->push_vec4(tmp);
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return true;
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}
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