Add regression test for issue #732.
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@ -0,0 +1,7 @@
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0 x x x
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1000 0 x x
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1100 0 0 x
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1200 0 0 0
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2000 1 0 0
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2100 1 1 0
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2200 1 1 1
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@ -0,0 +1,37 @@
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`timescale 1ns/1ps
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module Buffer(output Y, input A);
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specparam Delay = 0.1;
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assign #Delay Y = A;
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endmodule
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module Buffer1(output Y, input A);
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Buffer inst(.Y(Y), .A(A));
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endmodule
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module Buffer2(output Y, input A);
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Buffer inst(.Y(Y), .A(A));
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endmodule
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`timescale 1ps/1ps
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module dut();
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reg n1;
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wire n2;
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wire n3;
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Buffer1 b1(.A(n1), .Y(n2));
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Buffer2 b2(.A(n2), .Y(n3));
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initial begin
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$monitor("%t %b %b %b", $time, n1, n2, n3);
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#1000 n1 = 0;
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#1000 n1 = 1;
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#1000 $finish(0);
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end
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endmodule
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@ -348,6 +348,7 @@ br_gh632 normal ivltests
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br_gh632b normal,-S ivltests
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br_gh632b normal,-S ivltests
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br_gh632c normal ivltests
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br_gh632c normal ivltests
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br_gh674 normal ivltests
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br_gh674 normal ivltests
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br_gh732 normal ivltests gold=br_gh732.gold
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br_ml20150315 normal ivltests gold=br_ml_20150315.gold
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br_ml20150315 normal ivltests gold=br_ml_20150315.gold
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br_ml20150321 CE ivltests
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br_ml20150321 CE ivltests
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br_ml20150606 normal ivltests
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br_ml20150606 normal ivltests
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