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iverilog
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Merge branch 'v10-branch' of github.com:steveicarus/iverilog into v10-branch

This commit is contained in:
Stephen Williams 2019-10-02 18:34:48 -07:00
parent 9554c32f42 adfabf34bf
commit c5e65b5cc8
1 changed files with 8 additions and 8 deletions
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16
elaborate.cc
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@ -6154,17 +6154,17 @@ bool Design::check_proc_delay() const
DelayType dly_type = pr->statement()->delay_type();
if (dly_type == NO_DELAY || dly_type == ZERO_DELAY) {
cerr << pr->get_fileline() << ": error: always"
<< " statement does not have any delay." << endl;
cerr << pr->get_fileline() << ": : A runtime"
<< " infinite loop will occur." << endl;
cerr << pr->get_fileline() << ": error: always "
<< "process does not have any delay." << endl;
cerr << pr->get_fileline() << ": : A runtime "
<< "infinite loop will occur." << endl;
result_flag = false;
} else if (dly_type == POSSIBLE_DELAY && warn_inf_loop) {
cerr << pr->get_fileline() << ": warning: always"
<< " statement may not have any delay." << endl;
cerr << pr->get_fileline() << ": : A runtime"
<< " infinite loop may be possible." << endl;
cerr << pr->get_fileline() << ": warning: always "
<< "process may not have any delay." << endl;
cerr << pr->get_fileline() << ": : A runtime "
<< "infinite loop may be possible." << endl;
}
}