Merge branch 'v10-branch' of github.com:steveicarus/iverilog into v10-branch
This commit is contained in:
commit
c5e65b5cc8
|
|
@ -6155,14 +6155,14 @@ bool Design::check_proc_delay() const
|
||||||
|
|
||||||
if (dly_type == NO_DELAY || dly_type == ZERO_DELAY) {
|
if (dly_type == NO_DELAY || dly_type == ZERO_DELAY) {
|
||||||
cerr << pr->get_fileline() << ": error: always "
|
cerr << pr->get_fileline() << ": error: always "
|
||||||
<< " statement does not have any delay." << endl;
|
<< "process does not have any delay." << endl;
|
||||||
cerr << pr->get_fileline() << ": : A runtime "
|
cerr << pr->get_fileline() << ": : A runtime "
|
||||||
<< "infinite loop will occur." << endl;
|
<< "infinite loop will occur." << endl;
|
||||||
result_flag = false;
|
result_flag = false;
|
||||||
|
|
||||||
} else if (dly_type == POSSIBLE_DELAY && warn_inf_loop) {
|
} else if (dly_type == POSSIBLE_DELAY && warn_inf_loop) {
|
||||||
cerr << pr->get_fileline() << ": warning: always "
|
cerr << pr->get_fileline() << ": warning: always "
|
||||||
<< " statement may not have any delay." << endl;
|
<< "process may not have any delay." << endl;
|
||||||
cerr << pr->get_fileline() << ": : A runtime "
|
cerr << pr->get_fileline() << ": : A runtime "
|
||||||
<< "infinite loop may be possible." << endl;
|
<< "infinite loop may be possible." << endl;
|
||||||
}
|
}
|
||||||
|
|
|
||||||
Loading…
Reference in New Issue