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vhdlpp: Apply case equality operator for logic type.

This commit is contained in:
Maciej Suminski 2016-02-29 16:48:10 +01:00
parent 41a45a8db0
commit c25be111a3
1 changed files with 14 additions and 2 deletions
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16
vhdlpp/expression_emit.cc
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@ -888,9 +888,21 @@ int ExpRelation::emit(ostream&out, Entity*ent, ScopeBase*scope) const
int errors = 0; int errors = 0;
errors += emit_operand1(out, ent, scope); errors += emit_operand1(out, ent, scope);
const VType*type1 = peek_operand1()->probe_type(ent, scope);
const VType*type2 = peek_operand2()->probe_type(ent, scope);
bool logical_compare = false;
// Apply case equality operator if any of the operands is of logic type
if(((type1 && (type1->type_match(&primitive_STDLOGIC) ||
type1->type_match(&primitive_STDLOGIC_VECTOR)))
|| (type2 && (type2->type_match(&primitive_STDLOGIC) ||
type2->type_match(&primitive_STDLOGIC_VECTOR))))) {
logical_compare = true;
}
switch (fun_) { switch (fun_) {
case EQ: case EQ:
out << " == "; out << (logical_compare ? " === " : " == ");
break; break;
case LT: case LT:
out << " < "; out << " < ";
@ -899,7 +911,7 @@ int ExpRelation::emit(ostream&out, Entity*ent, ScopeBase*scope) const
out << " > "; out << " > ";
break; break;
case NEQ: case NEQ:
out << " != "; out << (logical_compare ? " !== " : " != ");
break; break;
case LE: case LE:
out << " <= "; out << " <= ";