Logic devices now working again

tgt-vhdl/scope.cc

@@ -244,8 +244,23 @@ void draw_nexus(ivl_nexus_t nexus)
 
        draw_nexus(nexus);
     }
+
+    nexus_private_t *priv =
+       static_cast<nexus_private_t*>(ivl_nexus_get_private(nexus));
+    assert(priv);
+
+    ivl_signal_t sig = visible_nexus_signal(priv, scope);
+    assert(sig);
+
+    const string &renamed = get_renamed_signal(sig);
+
+    cout << "--> signal " << renamed << endl;
+
+    vhdl_decl *decl = scope->get_decl(renamed);
+    assert(decl);
     
-    assert(false);
+    vhdl_type *type = new vhdl_type(*(decl->get_type()));
+    return new vhdl_var_ref(renamed.c_str(), type);
  }
  
 

tgt-vhdl/vhdl.cc

@@ -158,7 +158,7 @@ extern "C" int target_design(ivl_design_t des)
    for (unsigned int i = 0; i < nroots; i++)
       draw_scope(roots[i], NULL);
 
-   //ivl_design_process(des, draw_process, NULL);
+   ivl_design_process(des, draw_process, NULL);
 
    // Write the generated elements to the output file
    // only if there are no errors