Spelling fixes

Comments and debug messages.
This commit is contained in:
Larry Doolittle 2012-07-10 15:36:33 -07:00 committed by Stephen Williams
parent dd284ee582
commit befff82655
5 changed files with 12 additions and 12 deletions

View File

@ -229,7 +229,7 @@ bool NetWhile::evaluate_function(const LineInfo&loc,
bool flag = true; bool flag = true;
if (debug_eval_tree) { if (debug_eval_tree) {
cerr << get_fileline() << ": debug: NetWhile::evaluate_fuction: " cerr << get_fileline() << ": debug: NetWhile::evaluate_function: "
<< "Start loop" << endl; << "Start loop" << endl;
} }
@ -252,7 +252,7 @@ bool NetWhile::evaluate_function(const LineInfo&loc,
if (val == 0) if (val == 0)
break; break;
// The condition is true, so evalutate the statement // The condition is true, so evaluate the statement
// another time. // another time.
bool tmp_flag = proc_->evaluate_function(loc, context_map); bool tmp_flag = proc_->evaluate_function(loc, context_map);
if (! tmp_flag) if (! tmp_flag)
@ -260,7 +260,7 @@ bool NetWhile::evaluate_function(const LineInfo&loc,
} }
if (debug_eval_tree) { if (debug_eval_tree) {
cerr << get_fileline() << ": debug: NetWhile::evaluate_fuction: " cerr << get_fileline() << ": debug: NetWhile::evaluate_function: "
<< "Done loop" << endl; << "Done loop" << endl;
} }

View File

@ -117,7 +117,7 @@ void sheet_box(ivl_scope_t scope, const map<string,attr_value>&attrs)
} }
/* /*
* A black box is a component. Do not process the contents, other then * A black box is a component. Do not process the contents, other than
* to get at the ports that we'll attach to the netlist. * to get at the ports that we'll attach to the netlist.
*/ */
static void black_box(ivl_scope_t scope, const map<string,attr_value>&attrs) static void black_box(ivl_scope_t scope, const map<string,attr_value>&attrs)

View File

@ -383,7 +383,7 @@ class ExpConcat : public Expression {
/* /*
* The conditional expression represents the VHDL when-else * The conditional expression represents the VHDL when-else
* expressions. Note that by the VHDL syntax rules, these cannot show * expressions. Note that by the VHDL syntax rules, these cannot show
* up other then at the root of an expression. * up other than at the root of an expression.
*/ */
class ExpConditional : public Expression { class ExpConditional : public Expression {

View File

@ -139,7 +139,7 @@ const VType*parse_type_by_name(perm_string name)
return active_scope->find_type(name); return active_scope->find_type(name);
} }
// This funciton is called when an aggregate expression is detected by // This function is called when an aggregate expression is detected by
// the parser. It makes the ExpAggregate. It also tries to detect the // the parser. It makes the ExpAggregate. It also tries to detect the
// special case that the aggregate is really a primary. The problem is // special case that the aggregate is really a primary. The problem is
// that this: // that this:

View File

@ -107,7 +107,7 @@ struct vthread_s {
unsigned delay_delete :1; unsigned delay_delete :1;
/* This points to the children of the thread. */ /* This points to the children of the thread. */
set<struct vthread_s*>children; set<struct vthread_s*>children;
/* No more then 1 of the children is automatic. */ /* No more than 1 of the children are automatic. */
set<vthread_s*>automatic_children; set<vthread_s*>automatic_children;
/* This points to my parent, if I have one. */ /* This points to my parent, if I have one. */
struct vthread_s*parent; struct vthread_s*parent;
@ -243,7 +243,7 @@ static vvp_vector4_t vthread_bits_to_vector(struct vthread_s*thr,
/* /*
* Some of the instructions do wide addition to arrays of long. They * Some of the instructions do wide addition to arrays of long. They
* use this add_with_cary function to help. * use this add_with_carry function to help.
*/ */
static inline unsigned long add_with_carry(unsigned long a, unsigned long b, static inline unsigned long add_with_carry(unsigned long a, unsigned long b,
unsigned long&carry) unsigned long&carry)
@ -1538,7 +1538,7 @@ bool of_CMPIS(vthread_t thr, vvp_code_t cp)
* in the vector part of the instruction. In this case we know that * in the vector part of the instruction. In this case we know that
* there is at least 1 xz bit in the left expression (and there are * there is at least 1 xz bit in the left expression (and there are
* none in the imm value) so the eeq result must be false. Otherwise, * none in the imm value) so the eeq result must be false. Otherwise,
* the eq result may me 0 or x, and the lt bit is x. * the eq result may be 0 or x, and the lt bit is x.
*/ */
static bool of_CMPIU_the_hard_way(vthread_t thr, vvp_code_t cp) static bool of_CMPIU_the_hard_way(vthread_t thr, vvp_code_t cp)
{ {
@ -2363,8 +2363,8 @@ bool of_END(vthread_t thr, vvp_code_t)
// Detect that the parent is waiting on an automatic // Detect that the parent is waiting on an automatic
// thread. Automatic threads must be reaped first. If // thread. Automatic threads must be reaped first. If
// the parent is waiting on an auto (other then me) then // the parent is waiting on an auto (other than me) then
// go into zomple state to be picked up later. // go into zombie state to be picked up later.
if (!test_joinable(tmp, thr)) if (!test_joinable(tmp, thr))
return false; return false;
@ -2909,7 +2909,7 @@ bool of_JOIN(vthread_t thr, vvp_code_t)
if (!test_joinable(thr, curp)) if (!test_joinable(thr, curp))
continue; continue;
// found somenting! // found something!
do_join(thr, curp); do_join(thr, curp);
return true; return true;
} }