Add -g2012 flag and keywords for IEEE 1800-2012.

compiler.h

@@ -141,6 +141,7 @@ enum generation_t {
       GN_VER2005  = 4,
       GN_VER2005_SV  = 5,
       GN_VER2009  = 6,
+      GN_VER2012  = 7,
       GN_DEFAULT  = 4
 };
 
@@ -178,7 +179,8 @@ extern bool gn_strict_expr_width_flag;
 static inline bool gn_var_can_be_uwire(void)
 {
       if (generation_flag == GN_VER2005_SV ||
-          generation_flag == GN_VER2009)
+          generation_flag == GN_VER2009  ||
+          generation_flag == GN_VER2012)
 	    return true;
       return false;
 }
@@ -186,7 +188,8 @@ static inline bool gn_var_can_be_uwire(void)
 static inline bool gn_system_verilog(void)
 {
       if (generation_flag == GN_VER2005_SV ||
-          generation_flag == GN_VER2009)
+          generation_flag == GN_VER2009  ||
+          generation_flag == GN_VER2012)
 	    return true;
       return false;
 }
@@ -207,6 +210,7 @@ enum { GN_KEYWORDS_1364_1995        = 0x0001,
        GN_KEYWORDS_VAMS_2_3         = 0x0010,
        GN_KEYWORDS_1800_2005        = 0x0020,
        GN_KEYWORDS_1800_2009        = 0x0040,
+       GN_KEYWORDS_1800_2012        = 0x0080,
        GN_KEYWORDS_ICARUS           = 0x8000
 };
 extern int lexor_keyword_mask;

driver/iverilog.man.in

@@ -1,4 +1,4 @@
-.TH iverilog 1 "February 27th, 2011" "" "Version %M.%m.%n %E"
+.TH iverilog 1 "April 2nd, 2013" "" "Version %M.%m.%n %E"
 .SH NAME
 iverilog - Icarus Verilog compiler
 
@@ -6,7 +6,7 @@ iverilog - Icarus Verilog compiler
 .B iverilog
 [\-ESVv] [\-Bpath] [\-ccmdfile|\-fcmdfile] [\-Dmacro[=defn]]
 [\-Pparameter=value] [\-pflag=value]
-[\-dname] [\-g1995|\-g2001|\-g2005|\-g2005-sv|\-g2009|\-g<feature>]
+[\-dname] [\-g1995|\-g2001|\-g2005|\-g2005-sv|\-g2009|\-g2012|\-g<feature>]
 [\-Iincludedir] [\-mmodule] [\-M[mode=]file] [\-Nfile] [\-ooutputfilename]
 [\-stopmodule] [\-ttype] [\-Tmin/typ/max] [\-Wclass] [\-ypath] sourcefile
 
@@ -61,10 +61,11 @@ is the Verilog input, but with file inclusions and macro references
 expanded and removed. This is useful, for example, to preprocess
 Verilog source for use by other compilers.
 .TP 8
-.B -g1995\fI|\fP-g2001\fI|\fP-g2001-noconfig\fI|\fP-g2005\fI|\fP-g2005-sv\fI|\fP-g2009
+.B -g1995\fI|\fP-g2001\fI|\fP-g2001-noconfig\fI|\fP-g2005\fI|\fP-g2005-sv\fI|\fP-g2009\fI|\fP-g2012
 Select the Verilog language \fIgeneration\fP to support in the compiler.
 This selects between \fIIEEE1364\-1995\fP, \fIIEEE1364\-2001\fP,
-\fIIEEE1364\-2005\fP, \fIIEEE1800\-2005\fP, or \fIIEEE1800\-2009\fP.
+\fIIEEE1364\-2005\fP, \fIIEEE1800\-2005\fP, \fIIEEE1800\-2009\fP, or
+\fIIEEE1800\-2012\fP.
 Icarus Verilog currently defaults to the \fIIEEE1364\-2005\fP generation
 of the language. This flag is used to restrict the language to a set of
 keywords/features, this allows simulation of older Verilog code that may

driver/main.c

@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2000-2011 Stephen Williams (steve@icarus.com)
+ * Copyright (c) 2000-2013 Stephen Williams (steve@icarus.com)
  *
  *    This source code is free software; you can redistribute it
  *    and/or modify it in source code form under the terms of the GNU
@@ -39,7 +39,7 @@ const char NOTICE[] =
 
 const char HELP[] =
 "Usage: iverilog [-ESvV] [-B base] [-c cmdfile|-f cmdfile]\n"
-"                [-g1995|-g2001|-g2005|-g2005-sv|-g2009] [-g<feature>]\n"
+"                [-g1995|-g2001|-g2005|-g2005-sv|-g2009|-g2012] [-g<feature>]\n"
 "                [-D macro[=defn]] [-I includedir]\n"
 "                [-M [mode=]depfile] [-m module]\n"
 "                [-N file] [-o filename] [-p flag=value]\n"
@@ -642,6 +642,9 @@ int process_generation(const char*name)
       else if (strcmp(name,"2009") == 0)
 	    generation = "2009";
 
+      else if (strcmp(name,"2012") == 0)
+	    generation = "2012";
+
       else if (strcmp(name,"1") == 0) { /* Deprecated: use 1995 */
 	    generation = "1995";
 	    gen_xtypes = "no-xtypes";
@@ -720,6 +723,7 @@ int process_generation(const char*name)
 		            "    2005    -- IEEE1364-2005\n"
 		            "    2005-sv -- IEEE1800-2005\n"
 		            "    2009    -- IEEE1800-2009\n"
+		            "    2012    -- IEEE1800-2012\n"
 		            "Other generation flags:\n"
 		            "    specify | no-specify\n"
 		            "    verilog-ams | no-verilog-ams\n"
@@ -1031,7 +1035,7 @@ int main(int argc, char **argv)
 
       if (version_flag || verbose_flag) {
 	    printf("Icarus Verilog version " VERSION " (" VERSION_TAG ")\n\n");
-	    printf("Copyright 1998-2011 Stephen Williams\n\n");
+	    printf("Copyright 1998-2013 Stephen Williams\n\n");
 	    puts(NOTICE);
       }
 
@@ -1057,10 +1061,11 @@ int main(int argc, char **argv)
       fprintf(iconfig_file, "sys_func:%s%csystem.sft\n", base, sep);
       fprintf(iconfig_file, "sys_func:%s%cvhdl_sys.sft\n", base, sep);
 
-	/* If verilog-2005/9 is enabled or icarus-misc or verilog-ams,
+	/* If verilog-2005/09/12 is enabled or icarus-misc or verilog-ams,
 	 * then include the v2005_math library. */
       if (strcmp(generation, "2005") == 0 ||
           strcmp(generation, "2009") == 0 ||
+          strcmp(generation, "2012") == 0 ||
           strcmp(gen_icarus, "icarus-misc") == 0 ||
           strcmp(gen_verilog_ams, "verilog-ams") == 0) {
 	    fprintf(iconfig_file, "sys_func:%s%cv2005_math.sft\n", base, sep);
@@ -1076,7 +1081,8 @@ int main(int argc, char **argv)
       /* If verilog-2009 (SystemVerilog) is enabled, then include the
          v2009 module. */
       if (strcmp(generation, "2005-sv") == 0 ||
-          strcmp(generation, "2009") == 0) {
+          strcmp(generation, "2009") == 0 ||
+          strcmp(generation, "2012") == 0) {
 	    fprintf(iconfig_file, "sys_func:%s%cv2009.sft\n", base, sep);
 	    fprintf(iconfig_file, "module:v2009\n");
       }

lexor.lex

@@ -4,7 +4,7 @@
 
 %{
 /*
- * Copyright (c) 1998-2012 Stephen Williams (steve@icarus.com)
+ * Copyright (c) 1998-2013 Stephen Williams (steve@icarus.com)
  *
  *    This source code is free software; you can redistribute it
  *    and/or modify it in source code form under the terms of the GNU
@@ -399,7 +399,7 @@ TU [munpf]
 
   /* This rule handles scaled time values for SystemVerilog. */
 [0-9][0-9_]*(\.[0-9][0-9_]*)?{TU}?s {
-      if(generation_flag & (GN_VER2005_SV | GN_VER2009)) {
+      if(generation_flag & (GN_VER2005_SV | GN_VER2009 | GN_VER2012)) {
 	    yylval.text = strdupnew(yytext);
 	    return TIME_LITERAL;
       } else REJECT; }
@@ -572,6 +572,14 @@ TU [munpf]
 		                |GN_KEYWORDS_1364_2005
 		                |GN_KEYWORDS_1800_2005
 		                |GN_KEYWORDS_1800_2009;
+      } else if (strcmp(word,"1800-2012") == 0) {
+	    lexor_keyword_mask = GN_KEYWORDS_1364_1995
+		                |GN_KEYWORDS_1364_2001
+		                |GN_KEYWORDS_1364_2001_CONFIG
+		                |GN_KEYWORDS_1364_2005
+		                |GN_KEYWORDS_1800_2005
+		                |GN_KEYWORDS_1800_2009
+		                |GN_KEYWORDS_1800_2012;
       } else if (strcmp(word,"VAMS-2.3") == 0) {
 	    lexor_keyword_mask = GN_KEYWORDS_1364_1995
 		                |GN_KEYWORDS_1364_2001

lexor_keyword.gperf

@@ -161,6 +161,7 @@ ifnone,			GN_KEYWORDS_1364_1995,		K_ifnone
 ignore_bins,		GN_KEYWORDS_1800_2005,		K_ignore_bins
 illegal_bins,		GN_KEYWORDS_1800_2005,		K_illegal_bins
 implies,		GN_KEYWORDS_1800_2009,		K_implies
+implements,		GN_KEYWORDS_1800_2012,		K_implements
 import,			GN_KEYWORDS_1800_2005,		K_import
 incdir,			GN_KEYWORDS_1364_2001_CONFIG,	K_incdir
 include,		GN_KEYWORDS_1364_2001_CONFIG,	K_include
@@ -173,6 +174,7 @@ inside,			GN_KEYWORDS_1800_2005,		K_inside
 instance,		GN_KEYWORDS_1364_2001_CONFIG,	K_instance
 int,			GN_KEYWORDS_1800_2005,		K_int
 integer,		GN_KEYWORDS_1364_1995,		K_integer
+interconnect,		GN_KEYWORDS_1800_2012,		K_interconnect
 interface,		GN_KEYWORDS_1800_2005,		K_interface
 intersect,		GN_KEYWORDS_1800_2005,		K_intersect
 join,			GN_KEYWORDS_1364_1995,		K_join
@@ -207,6 +209,7 @@ nand,			GN_KEYWORDS_1364_1995,		K_nand
 nature,			GN_KEYWORDS_VAMS_2_3,		K_nature
 negedge,		GN_KEYWORDS_1364_1995,		K_negedge
 net_resolution,		GN_KEYWORDS_VAMS_2_3,		K_net_resolution
+nettype,		GN_KEYWORDS_1800_2012,		K_nettype
 new,			GN_KEYWORDS_1800_2005,		K_new
 nexttime,		GN_KEYWORDS_1800_2009,		K_nexttime
 nmos,			GN_KEYWORDS_1364_1995,		K_nmos
@@ -274,6 +277,7 @@ sin,			GN_KEYWORDS_VAMS_2_3,		K_sin
 sinh,			GN_KEYWORDS_VAMS_2_3,		K_sinh
 slew,			GN_KEYWORDS_VAMS_2_3,		K_slew
 small,			GN_KEYWORDS_1364_1995,		K_small
+soft,			GN_KEYWORDS_1800_2012,		K_soft
 solve,			GN_KEYWORDS_1800_2005,		K_solve
 specify,		GN_KEYWORDS_1364_1995,		K_specify
 specparam,		GN_KEYWORDS_1364_1995,		K_specparam

main.cc

@@ -286,6 +286,9 @@ static void process_generation_flag(const char*gen)
       } else if (strcmp(gen,"2009") == 0) {
 	    generation_flag = GN_VER2009;
 
+      } else if (strcmp(gen,"2012") == 0) {
+	    generation_flag = GN_VER2012;
+
       } else if (strcmp(gen,"icarus-misc") == 0) {
 	    gn_icarus_misc_flag = true;
 
@@ -901,6 +904,8 @@ int main(int argc, char*argv[])
 
       lexor_keyword_mask = 0;
       switch (generation_flag) {
+        case GN_VER2012:
+	  lexor_keyword_mask |= GN_KEYWORDS_1800_2012;
         case GN_VER2009:
 	  lexor_keyword_mask |= GN_KEYWORDS_1800_2009;
         case GN_VER2005_SV:
@@ -945,6 +950,9 @@ int main(int argc, char*argv[])
 		case GN_VER2009:
 		  cout << "IEEE1800-2009";
 		  break;
+		case GN_VER2012:
+		  cout << "IEEE1800-2012";
+		  break;
 	    }
 
 	    if (gn_verilog_ams_flag)

parse.y

@@ -490,6 +490,9 @@ static void current_function_set_statement(const YYLTYPE&loc, vector<Statement*>
 %token K_s_nexttime K_s_until K_s_until_with K_strong K_sync_accept_on
 %token K_sync_reject_on K_unique0 K_until K_until_with K_untyped K_weak
 
+ /* The new tokens from 1800-2012. */
+%token K_implements K_interconnect K_nettype K_soft
+
  /* The new tokens for Verilog-AMS 2.3. */
 %token K_above K_abs K_absdelay K_abstol K_access K_acos K_acosh
  /* 1800-2005 has defined "assert" above! */

pform.cc

@@ -922,7 +922,7 @@ void pform_startmodule(const struct vlltype&loc, const char*name,
 void pform_check_timeunit_prec()
 {
       assert(! pform_cur_module.empty());
-      if ((generation_flag & (GN_VER2005_SV | GN_VER2009)) &&
+      if ((generation_flag & (GN_VER2005_SV | GN_VER2009 | GN_VER2012)) &&
           (pform_cur_module.front()->time_unit < pform_cur_module.front()->time_precision)) {
 	    VLerror("error: a timeprecision is missing or is too large!");
       } else assert(pform_cur_module.front()->time_unit >=