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@ -264,7 +264,7 @@ that contain Verilog source files. During elaboration, the compiler
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notices the instantiation of undefined module types. If the user
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specifies library search directories, the compiler will search the
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directory for files with the name of the missing module type. If it
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finds such a file, it loads it as a Verilog source file, they tries
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finds such a file, it loads it as a Verilog source file, then tries
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again to elaborate the module.
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Library module files should contain only a single module, but this is
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