luke
/
iverilog
mirror of https://github.com/steveicarus/iverilog.git
1
0
Fork 0
Code Issues Packages Projects Releases Wiki Activity

Update LDFLAGS usage in tgt-pal and tgt-pcb to match the other directories

This commit is contained in:
Cary R 2013-01-29 17:25:45 -08:00
parent b176a6410d
commit bcc7973792
2 changed files with 2 additions and 2 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
tgt-pal/Makefile.in
View File

@ -76,7 +76,7 @@ else
endif
pal.tgt: $O $(TGTDEPLIBS)
$(CC) @shared@ $(LDFLAGS)-o $@ $O $(TGTLDFLAGS) $(LDFLAGS) -lipal
$(CC) @shared@ $(LDFLAGS) -o $@ $O $(TGTLDFLAGS) -lipal
install: all installdirs $(libdir)/ivl/pal.tgt

2
tgt-pcb/Makefile.in
View File

@ -93,7 +93,7 @@ else
endif
pcb.tgt: $O $(TGTDEPLIBS)
$(CXX) @shared@ -o $@ $O $(TGTLDFLAGS)
$(CXX) @shared@ $(LDFLAGS) -o $@ $O $(TGTLDFLAGS)
install: all installdirs $(libdir)/ivl$(suffix)/pcb.tgt $(INSTALL_DOC) $(libdir)/ivl$(suffix)/pcb.conf $(libdir)/ivl$(suffix)/pcb-s.conf