luke
/
iverilog
mirror of https://github.com/steveicarus/iverilog.git
1
0
Fork 0
Code Issues Packages Projects Releases Wiki Activity

Fix some -Wextra warnings and some other bug fixes/enhancements. 

This patch covers more than it should. It removes many of the -Wextra
warnings in the main ivl directory. It also makes some minor code
improvements, adds support for constant logicals in eval_tree (&&/||),
adds support for correctly sign extending === and !==, it starts to
standardize the eval_tree debug messages and fixes a strength bug
in the target interface (found with -Wextra). The rest of the warnings
and eval_tree() rework will need to come as a second patch.
This commit is contained in:
Cary R 2010-11-01 14:37:06 -07:00 committed by Stephen Williams
parent 57f9130b50
commit bb5ca97f2d
29 changed files with 577 additions and 464 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

6
Makefile.in
View File

@ -83,7 +83,8 @@ INCLUDE_PATH = -I. -I$(srcdir)
endif endif
CPPFLAGS = @DEFS@ $(INCLUDE_PATH) @CPPFLAGS@ CPPFLAGS = @DEFS@ $(INCLUDE_PATH) @CPPFLAGS@
CXXFLAGS = @WARNING_FLAGS@ @CXXFLAGS@ CFLAGS = @WARNING_FLAGS@ @CFLAGS@
CXXFLAGS = @WARNING_FLAGS@ @WARNING_FLAGS_CXX@ @CXXFLAGS@
PICFLAGS = @PICFLAG@ PICFLAGS = @PICFLAG@
LDFLAGS = @rdynamic@ @LDFLAGS@ LDFLAGS = @rdynamic@ @LDFLAGS@
@ -211,7 +212,8 @@ iverilog-vpi: $(srcdir)/iverilog-vpi.sh Makefile
-e 's;@SUFFIX@;$(suffix);' \ -e 's;@SUFFIX@;$(suffix);' \
-e 's;@IVCC@;$(CC);' \ -e 's;@IVCC@;$(CC);' \
-e 's;@IVCXX@;$(CXX);' \ -e 's;@IVCXX@;$(CXX);' \
-e 's;@IVCFLAGS@;$(CXXFLAGS);' \ -e 's;@IVCFLAGS@;$(CFLAGS);' \
-e 's;@IVCXXFLAGS@;$(CXXFLAGS);' \
-e 's;@INCLUDEDIR@;$(includedir);' \ -e 's;@INCLUDEDIR@;$(includedir);' \
-e 's;@LIBDIR@;@libdir@;' $< > $@ -e 's;@LIBDIR@;@libdir@;' $< > $@
chmod +x $@ chmod +x $@

17
PExpr.cc
View File

@ -1,5 +1,5 @@
/* /*
* Copyright (c) 1998-2008,2010 Stephen Williams <steve@icarus.com> * Copyright (c) 1998-2010 Stephen Williams <steve@icarus.com>
* *
* This source code is free software; you can redistribute it * This source code is free software; you can redistribute it
* and/or modify it in source code form under the terms of the GNU * and/or modify it in source code form under the terms of the GNU
@ -38,7 +38,7 @@ PExpr::~PExpr()
{ {
} }
void PExpr::declare_implicit_nets(LexicalScope*scope, NetNet::Type type) void PExpr::declare_implicit_nets(LexicalScope*, NetNet::Type)
{ {
} }
@ -52,18 +52,19 @@ bool PExpr::is_the_same(const PExpr*that) const
return typeid(this) == typeid(that); return typeid(this) == typeid(that);
} }
NetNet* PExpr::elaborate_lnet(Design*des, NetScope*) const NetNet* PExpr::elaborate_lnet(Design*, NetScope*) const
{ {
cerr << get_fileline() << ": error: expression not valid in assign l-value: " cerr << get_fileline() << ": error: "
<< *this << endl; << "expression not valid in assign l-value: "
<< *this << endl;
return 0; return 0;
} }
NetNet* PExpr::elaborate_bi_net(Design*des, NetScope*) const NetNet* PExpr::elaborate_bi_net(Design*, NetScope*) const
{ {
cerr << get_fileline() << ": error: " cerr << get_fileline() << ": error: "
<< "expression not valid as argument to inout port: " << "expression not valid as argument to inout port: "
<< *this << endl; << *this << endl;
return 0; return 0;
} }

3
PGate.h
View File

@ -237,7 +237,10 @@ class PGModule : public PGate {
void elaborate_scope_mod_(Design*des, Module*mod, NetScope*sc) const; void elaborate_scope_mod_(Design*des, Module*mod, NetScope*sc) const;
void elaborate_scope_mod_instances_(Design*des, Module*mod, NetScope*sc) const; void elaborate_scope_mod_instances_(Design*des, Module*mod, NetScope*sc) const;
bool elaborate_sig_mod_(Design*des, NetScope*scope, Module*mod) const; bool elaborate_sig_mod_(Design*des, NetScope*scope, Module*mod) const;
// Not currently used.
#if 0
bool elaborate_sig_udp_(Design*des, NetScope*scope, PUdp*udp) const; bool elaborate_sig_udp_(Design*des, NetScope*scope, PUdp*udp) const;
#endif
NetNet*resize_net_to_port_(Design*des, NetScope*scope, NetNet*resize_net_to_port_(Design*des, NetScope*scope,
NetNet*sig, unsigned port_wid, NetNet*sig, unsigned port_wid,

14
cprop.cc
View File

@ -1,5 +1,5 @@
/* /*
* Copyright (c) 1998-2009 Stephen Williams (steve@icarus.com) * Copyright (c) 1998-2010 Stephen Williams (steve@icarus.com)
* *
* This source code is free software; you can redistribute it * This source code is free software; you can redistribute it
* and/or modify it in source code form under the terms of the GNU * and/or modify it in source code form under the terms of the GNU
@ -48,11 +48,11 @@ struct cprop_functor : public functor_t {
virtual void lpm_mux(Design*des, NetMux*obj); virtual void lpm_mux(Design*des, NetMux*obj);
}; };
void cprop_functor::signal(Design*des, NetNet*obj) void cprop_functor::signal(Design*, NetNet*)
{ {
} }
void cprop_functor::lpm_add_sub(Design*des, NetAddSub*obj) void cprop_functor::lpm_add_sub(Design*, NetAddSub*)
{ {
} }
@ -70,11 +70,11 @@ void cprop_functor::lpm_compare(Design*des, NetCompare*obj)
} }
} }
void cprop_functor::lpm_compare_eq_(Design*des, NetCompare*obj) void cprop_functor::lpm_compare_eq_(Design*, NetCompare*)
{ {
} }
void cprop_functor::lpm_ff(Design*des, NetFF*obj) void cprop_functor::lpm_ff(Design*, NetFF*obj)
{ {
// Look for and count unlinked FF outputs. Note that if the // Look for and count unlinked FF outputs. Note that if the
// Data and Q pins are connected together, they can be removed // Data and Q pins are connected together, they can be removed
@ -91,7 +91,7 @@ void cprop_functor::lpm_ff(Design*des, NetFF*obj)
} }
} }
void cprop_functor::lpm_logic(Design*des, NetLogic*obj) void cprop_functor::lpm_logic(Design*, NetLogic*)
{ {
} }
@ -167,7 +167,7 @@ struct nexus_info_s {
unsigned out; unsigned out;
}; };
void cprop_dc_functor::lpm_const(Design*des, NetConst*obj) void cprop_dc_functor::lpm_const(Design*, NetConst*obj)
{ {
// 'bz constant values drive high impedance to whatever is // 'bz constant values drive high impedance to whatever is
// connected to it. In other words, it is a noop. But that is // connected to it. In other words, it is a noop. But that is

77
elab_expr.cc
View File

@ -127,8 +127,8 @@ NetExpr* elaborate_rval_expr(Design*des, NetScope*scope,
* The default behavior for the test_width method is to just return the * The default behavior for the test_width method is to just return the
* minimum width that is passed in. * minimum width that is passed in.
*/ */
unsigned PExpr::test_width(Design*des, NetScope*scope, unsigned PExpr::test_width(Design*, NetScope*,
unsigned min, unsigned lval, unsigned min, unsigned,
ivl_variable_type_t&, bool&) ivl_variable_type_t&, bool&)
{ {
if (debug_elaborate) { if (debug_elaborate) {
@ -226,9 +226,12 @@ unsigned PEBinary::test_width(Design*des, NetScope*scope,
break; break;
} }
if (type_is_vectorable(expr_type_)) if (type_is_vectorable(expr_type_)) {
// We don't use (need?) lval so make sure the minimum width
// is greater than or equal to the the L-value width.
assert(min >= lval);
expr_width_ = min; expr_width_ = min;
else } else
expr_width_ = 1; expr_width_ = 1;
expr_type__ = expr_type_; expr_type__ = expr_type_;
@ -447,7 +450,7 @@ NetExpr* PEBinary::elaborate_expr_base_bits_(Design*des,
NetExpr* PEBinary::elaborate_expr_base_div_(Design*des, NetExpr* PEBinary::elaborate_expr_base_div_(Design*des,
NetExpr*lp, NetExpr*rp, NetExpr*lp, NetExpr*rp,
int expr_wid, bool is_pexpr) const int expr_wid, bool) const
{ {
/* The % operator does not support real arguments in /* The % operator does not support real arguments in
baseline Verilog. But we allow it in our extended baseline Verilog. But we allow it in our extended
@ -737,7 +740,7 @@ NetExpr* PEBinary::elaborate_expr_base_rshift_(Design*des,
return tmp; return tmp;
} }
NetExpr* PEBinary::elaborate_expr_base_mult_(Design*des, NetExpr* PEBinary::elaborate_expr_base_mult_(Design*,
NetExpr*lp, NetExpr*rp, NetExpr*lp, NetExpr*rp,
int expr_wid, bool is_pexpr) const int expr_wid, bool is_pexpr) const
{ {
@ -800,7 +803,7 @@ NetExpr* PEBinary::elaborate_expr_base_mult_(Design*des,
return tmp; return tmp;
} }
NetExpr* PEBinary::elaborate_expr_base_add_(Design*des, NetExpr* PEBinary::elaborate_expr_base_add_(Design*,
NetExpr*lp, NetExpr*rp, NetExpr*lp, NetExpr*rp,
int expr_wid, bool is_pexpr) const int expr_wid, bool is_pexpr) const
{ {
@ -888,7 +891,7 @@ unsigned PEBComp::test_width(Design*des, NetScope*scope, unsigned, unsigned,
} }
NetExpr* PEBComp::elaborate_expr(Design*des, NetScope*scope, NetExpr* PEBComp::elaborate_expr(Design*des, NetScope*scope,
int expr_width_dummy, bool sys_task_arg) const int, bool) const
{ {
assert(left_); assert(left_);
assert(right_); assert(right_);
@ -943,10 +946,10 @@ NetExpr* PEBComp::elaborate_expr(Design*des, NetScope*scope,
return tmp; return tmp;
} }
unsigned PEBLogic::test_width(Design*des, NetScope*scope, unsigned PEBLogic::test_width(Design*, NetScope*,
unsigned min, unsigned lval, unsigned, unsigned,
ivl_variable_type_t&expr_type_out, ivl_variable_type_t&expr_type_out,
bool&unsized_flag) bool&)
{ {
expr_type_ = IVL_VT_LOGIC; expr_type_ = IVL_VT_LOGIC;
expr_width_ = 1; expr_width_ = 1;
@ -955,7 +958,7 @@ unsigned PEBLogic::test_width(Design*des, NetScope*scope,
} }
NetExpr*PEBLogic::elaborate_expr(Design*des, NetScope*scope, NetExpr*PEBLogic::elaborate_expr(Design*des, NetScope*scope,
int expr_width_dummp, bool sys_task_arg) const int, bool) const
{ {
assert(left_); assert(left_);
assert(right_); assert(right_);
@ -1038,7 +1041,7 @@ unsigned PEBLeftWidth::test_width(Design*des, NetScope*scope,
} }
NetExpr*PEBLeftWidth::elaborate_expr(Design*des, NetScope*scope, NetExpr*PEBLeftWidth::elaborate_expr(Design*des, NetScope*scope,
int expr_wid, bool sys_task_arg) const int expr_wid, bool) const
{ {
assert(left_); assert(left_);
assert(right_); assert(right_);
@ -1065,7 +1068,7 @@ NetExpr*PEBLeftWidth::elaborate_expr(Design*des, NetScope*scope,
return elaborate_expr_leaf(des, lp, rp, expr_wid); return elaborate_expr_leaf(des, lp, rp, expr_wid);
} }
NetExpr*PEBPower::elaborate_expr_leaf(Design*des, NetExpr*lp, NetExpr*rp, NetExpr*PEBPower::elaborate_expr_leaf(Design*, NetExpr*lp, NetExpr*rp,
int expr_wid) const int expr_wid) const
{ {
if (debug_elaborate) { if (debug_elaborate) {
@ -1129,6 +1132,9 @@ unsigned PECallFunction::test_width_sfunc_(Design*des, NetScope*scope,
<< " argument width = " << expr_width_ << " argument width = " << expr_width_
<< ", result width = " << min << "." << endl; << ", result width = " << min << "." << endl;
// We don't use (need?) lval so make sure the minimum width
// is greater than or equal to the the L-value width.
assert(min >= lval);
return min; return min;
} }
@ -1610,7 +1616,7 @@ NetExpr* PECallFunction::elaborate_expr(Design*des, NetScope*scope,
} }
unsigned PEConcat::test_width(Design*des, NetScope*scope, unsigned PEConcat::test_width(Design*des, NetScope*scope,
unsigned min, unsigned lval, unsigned, unsigned,
ivl_variable_type_t&expr_type__, ivl_variable_type_t&expr_type__,
bool&unsized_flag) bool&unsized_flag)
{ {
@ -1807,8 +1813,8 @@ NetExpr* PEConcat::elaborate_expr(Design*des, NetScope*scope,
* *
* Absent any better idea, we call all real valued results a width of 1. * Absent any better idea, we call all real valued results a width of 1.
*/ */
unsigned PEFNumber::test_width(Design*des, NetScope*scope, unsigned PEFNumber::test_width(Design*, NetScope*,
unsigned min, unsigned lval, unsigned, unsigned,
ivl_variable_type_t&expr_type__, ivl_variable_type_t&expr_type__,
bool&unsized_flag) bool&unsized_flag)
{ {
@ -1820,7 +1826,7 @@ unsigned PEFNumber::test_width(Design*des, NetScope*scope,
return 1; return 1;
} }
NetExpr* PEFNumber::elaborate_expr(Design*des, NetScope*scope, int, bool) const NetExpr* PEFNumber::elaborate_expr(Design*, NetScope*, int, bool) const
{ {
NetECReal*tmp = new NetECReal(*value_); NetECReal*tmp = new NetECReal(*value_);
tmp->set_line(*this); tmp->set_line(*this);
@ -1953,7 +1959,7 @@ NetExpr* PEIdent::calculate_up_do_base_(Design*des, NetScope*scope) const
return tmp; return tmp;
} }
bool PEIdent::calculate_param_range_(Design*des, NetScope*scope, bool PEIdent::calculate_param_range_(Design*, NetScope*,
const NetExpr*par_msb, long&par_msv, const NetExpr*par_msb, long&par_msv,
const NetExpr*par_lsb, long&par_lsv, const NetExpr*par_lsb, long&par_lsv,
long length) const long length) const
@ -2092,7 +2098,7 @@ unsigned PEIdent::test_width(Design*des, NetScope*scope,
// This is a parameter. If it is sized (meaning it was // This is a parameter. If it is sized (meaning it was
// declared with range expressions) then the range // declared with range expressions) then the range
// expressions would have been caught above. So if we // expressions would have been caught above. So if we
// got there there we know this is an unsized constant. // got here then we know this is an unsized constant.
expr_width_ = par->expr_width(); expr_width_ = par->expr_width();
unsized_flag = true; unsized_flag = true;
return expr_width_; return expr_width_;
@ -2103,6 +2109,10 @@ unsigned PEIdent::test_width(Design*des, NetScope*scope,
expr_type_ = IVL_VT_NO_TYPE; expr_type_ = IVL_VT_NO_TYPE;
expr_width_ = min; expr_width_ = min;
// We don't use (need?) lval so make sure the minimum width
// is greater than or equal to the the L-value width.
assert(min >= lval);
expr_type__ = expr_type_; expr_type__ = expr_type_;
return min; return min;
} }
@ -2301,7 +2311,7 @@ static verinum param_part_select_bits(const verinum&par_val, long wid,
NetExpr* PEIdent::elaborate_expr_param_part_(Design*des, NetScope*scope, NetExpr* PEIdent::elaborate_expr_param_part_(Design*des, NetScope*scope,
const NetExpr*par, const NetExpr*par,
NetScope*found_in, NetScope*,
const NetExpr*par_msb, const NetExpr*par_msb,
const NetExpr*par_lsb) const const NetExpr*par_lsb) const
{ {
@ -2425,7 +2435,7 @@ static void warn_param_ob(long par_msv, long par_lsv, bool defined,
NetExpr* PEIdent::elaborate_expr_param_idx_up_(Design*des, NetScope*scope, NetExpr* PEIdent::elaborate_expr_param_idx_up_(Design*des, NetScope*scope,
const NetExpr*par, const NetExpr*par,
NetScope*found_in, NetScope*,
const NetExpr*par_msb, const NetExpr*par_msb,
const NetExpr*par_lsb) const const NetExpr*par_lsb) const
{ {
@ -2504,7 +2514,7 @@ NetExpr* PEIdent::elaborate_expr_param_idx_up_(Design*des, NetScope*scope,
NetExpr* PEIdent::elaborate_expr_param_idx_do_(Design*des, NetScope*scope, NetExpr* PEIdent::elaborate_expr_param_idx_do_(Design*des, NetScope*scope,
const NetExpr*par, const NetExpr*par,
NetScope*found_in, NetScope*,
const NetExpr*par_msb, const NetExpr*par_msb,
const NetExpr*par_lsb) const const NetExpr*par_lsb) const
{ {
@ -2900,7 +2910,7 @@ NetExpr* PEIdent::elaborate_expr_net_word_(Design*des, NetScope*scope,
* Handle part selects of NetNet identifiers. * Handle part selects of NetNet identifiers.
*/ */
NetExpr* PEIdent::elaborate_expr_net_part_(Design*des, NetScope*scope, NetExpr* PEIdent::elaborate_expr_net_part_(Design*des, NetScope*scope,
NetESignal*net, NetScope*found_in) const NetESignal*net, NetScope*) const
{ {
long msv, lsv; long msv, lsv;
bool parts_defined_flag; bool parts_defined_flag;
@ -3005,7 +3015,7 @@ NetExpr* PEIdent::elaborate_expr_net_part_(Design*des, NetScope*scope,
* Part select indexed up, i.e. net[<m> +: <l>] * Part select indexed up, i.e. net[<m> +: <l>]
*/ */
NetExpr* PEIdent::elaborate_expr_net_idx_up_(Design*des, NetScope*scope, NetExpr* PEIdent::elaborate_expr_net_idx_up_(Design*des, NetScope*scope,
NetESignal*net, NetScope*found_in) const NetESignal*net, NetScope*) const
{ {
NetExpr*base = calculate_up_do_base_(des, scope); NetExpr*base = calculate_up_do_base_(des, scope);
@ -3093,7 +3103,7 @@ NetExpr* PEIdent::elaborate_expr_net_idx_up_(Design*des, NetScope*scope,
* Part select indexed down, i.e. net[<m> -: <l>] * Part select indexed down, i.e. net[<m> -: <l>]
*/ */
NetExpr* PEIdent::elaborate_expr_net_idx_do_(Design*des, NetScope*scope, NetExpr* PEIdent::elaborate_expr_net_idx_do_(Design*des, NetScope*scope,
NetESignal*net, NetScope*found_in)const NetESignal*net, NetScope*)const
{ {
NetExpr*base = calculate_up_do_base_(des, scope); NetExpr*base = calculate_up_do_base_(des, scope);
@ -3177,7 +3187,7 @@ NetExpr* PEIdent::elaborate_expr_net_idx_do_(Design*des, NetScope*scope,
} }
NetExpr* PEIdent::elaborate_expr_net_bit_(Design*des, NetScope*scope, NetExpr* PEIdent::elaborate_expr_net_bit_(Design*des, NetScope*scope,
NetESignal*net, NetScope*found_in) const NetESignal*net, NetScope*) const
{ {
const name_component_t&name_tail = path_.back(); const name_component_t&name_tail = path_.back();
ivl_assert(*this, !name_tail.index.empty()); ivl_assert(*this, !name_tail.index.empty());
@ -3345,7 +3355,7 @@ unsigned PENumber::test_width(Design*, NetScope*,
return use_wid; return use_wid;
} }
NetEConst* PENumber::elaborate_expr(Design*des, NetScope*, NetEConst* PENumber::elaborate_expr(Design*, NetScope*,
int expr_width__, bool) const int expr_width__, bool) const
{ {
assert(value_); assert(value_);
@ -3369,10 +3379,10 @@ NetEConst* PENumber::elaborate_expr(Design*des, NetScope*,
return tmp; return tmp;
} }
unsigned PEString::test_width(Design*des, NetScope*scope, unsigned PEString::test_width(Design*, NetScope*,
unsigned min, unsigned lval, unsigned min, unsigned lval,
ivl_variable_type_t&expr_type__, ivl_variable_type_t&expr_type__,
bool&unsized_flag) bool&)
{ {
expr_type_ = IVL_VT_BOOL; expr_type_ = IVL_VT_BOOL;
expr_width_ = text_? 8*strlen(text_) : 0; expr_width_ = text_? 8*strlen(text_) : 0;
@ -3380,11 +3390,14 @@ unsigned PEString::test_width(Design*des, NetScope*scope,
expr_width_ = min; expr_width_ = min;
expr_type__ = expr_type_; expr_type__ = expr_type_;
// We don't use (need?) lval so make sure the minimum width
// is greater than or equal to the the L-value width.
assert(expr_width_ >= lval);
return expr_width_; return expr_width_;
} }
NetEConst* PEString::elaborate_expr(Design*des, NetScope*, NetEConst* PEString::elaborate_expr(Design*, NetScope*,
int expr_width_dummy, bool) const int, bool) const
{ {
NetEConst*tmp = new NetEConst(value()); NetEConst*tmp = new NetEConst(value());
tmp->set_line(*this); tmp->set_line(*this);

4
elab_lval.cc
View File

@ -66,9 +66,7 @@
* is to try to make a net elaboration, and see if the result is * is to try to make a net elaboration, and see if the result is
* suitable for assignment. * suitable for assignment.
*/ */
NetAssign_* PExpr::elaborate_lval(Design*des, NetAssign_* PExpr::elaborate_lval(Design*, NetScope*, bool) const
NetScope*scope,
bool is_force) const
{ {
NetNet*ll = 0; NetNet*ll = 0;
if (ll == 0) { if (ll == 0) {

2
elab_pexpr.cc
View File

@ -28,7 +28,7 @@
# include <iostream> # include <iostream>
# include "ivl_assert.h" # include "ivl_assert.h"
NetExpr*PExpr::elaborate_pexpr(Design*des, NetScope*sc) const NetExpr*PExpr::elaborate_pexpr(Design*des, NetScope*) const
{ {
cerr << get_fileline() << ": error: invalid parameter expression: " cerr << get_fileline() << ": error: invalid parameter expression: "
<< *this << endl; << *this << endl;

10
elab_scope.cc
View File

@ -247,7 +247,6 @@ static void elaborate_scope_events_(Design*des, NetScope*scope,
} }
static void elaborate_scope_tasks(Design*des, NetScope*scope, static void elaborate_scope_tasks(Design*des, NetScope*scope,
const LineInfo&loc,
const map<perm_string,PTask*>&tasks) const map<perm_string,PTask*>&tasks)
{ {
typedef map<perm_string,PTask*>::const_iterator tasks_it_t; typedef map<perm_string,PTask*>::const_iterator tasks_it_t;
@ -302,7 +301,6 @@ static void elaborate_scope_tasks(Design*des, NetScope*scope,
} }
static void elaborate_scope_funcs(Design*des, NetScope*scope, static void elaborate_scope_funcs(Design*des, NetScope*scope,
const LineInfo&loc,
const map<perm_string,PFunction*>&funcs) const map<perm_string,PFunction*>&funcs)
{ {
typedef map<perm_string,PFunction*>::const_iterator funcs_it_t; typedef map<perm_string,PFunction*>::const_iterator funcs_it_t;
@ -482,14 +480,14 @@ bool Module::elaborate_scope(Design*des, NetScope*scope,
// elaborate_scope method of the PTask for detailed // elaborate_scope method of the PTask for detailed
// processing. // processing.
elaborate_scope_tasks(des, scope, *this, tasks); elaborate_scope_tasks(des, scope, tasks);
// Functions are very similar to tasks, at least from the // Functions are very similar to tasks, at least from the
// perspective of scopes. So handle them exactly the same // perspective of scopes. So handle them exactly the same
// way. // way.
elaborate_scope_funcs(des, scope, *this, funcs); elaborate_scope_funcs(des, scope, funcs);
// Gates include modules, which might introduce new scopes, so // Gates include modules, which might introduce new scopes, so
// scan all of them to create those scopes. // scan all of them to create those scopes.
@ -1050,8 +1048,8 @@ void PGenerate::elaborate_subscope_(Design*des, NetScope*scope)
// Scan through all the task and function declarations in this // Scan through all the task and function declarations in this
// scope. // scope.
elaborate_scope_tasks(des, scope, *this, tasks); elaborate_scope_tasks(des, scope, tasks);
elaborate_scope_funcs(des, scope, *this, funcs); elaborate_scope_funcs(des, scope, funcs);
// Scan the generated scope for gates that may create // Scan the generated scope for gates that may create
// their own scopes. // their own scopes.

11
elab_sig.cc
View File

@ -78,7 +78,7 @@ static bool get_const_argument(NetExpr*exp, long&res)
return true; return true;
} }
void Statement::elaborate_sig(Design*des, NetScope*scope) const void Statement::elaborate_sig(Design*, NetScope*) const
{ {
} }
@ -268,17 +268,17 @@ bool Module::elaborate_sig(Design*des, NetScope*scope) const
return flag; return flag;
} }
bool PGate::elaborate_sig(Design*des, NetScope*scope) const bool PGate::elaborate_sig(Design*, NetScope*) const
{ {
return true; return true;
} }
bool PGBuiltin::elaborate_sig(Design*des, NetScope*scope) const bool PGBuiltin::elaborate_sig(Design*, NetScope*) const
{ {
return true; return true;
} }
bool PGAssign::elaborate_sig(Design*des, NetScope*scope) const bool PGAssign::elaborate_sig(Design*, NetScope*) const
{ {
return true; return true;
} }
@ -313,10 +313,13 @@ bool PGModule::elaborate_sig_mod_(Design*des, NetScope*scope,
return flag; return flag;
} }
// Not currently used.
#if 0
bool PGModule::elaborate_sig_udp_(Design*des, NetScope*scope, PUdp*udp) const bool PGModule::elaborate_sig_udp_(Design*des, NetScope*scope, PUdp*udp) const
{ {
return true; return true;
} }
#endif
bool PGenerate::elaborate_sig(Design*des, NetScope*container) const bool PGenerate::elaborate_sig(Design*des, NetScope*container) const
{ {

6
elaborate.cc
View File

@ -42,7 +42,7 @@
# include "ivl_assert.h" # include "ivl_assert.h"
void PGate::elaborate(Design*des, NetScope*scope) const void PGate::elaborate(Design*, NetScope*) const
{ {
cerr << "internal error: what kind of gate? " << cerr << "internal error: what kind of gate? " <<
typeid(*this).name() << endl; typeid(*this).name() << endl;
@ -1903,9 +1903,13 @@ bool PGModule::elaborate_sig(Design*des, NetScope*scope) const
if (mod != pform_modules.end()) if (mod != pform_modules.end())
return elaborate_sig_mod_(des, scope, (*mod).second); return elaborate_sig_mod_(des, scope, (*mod).second);
// elaborate_sig_udp_ currently always returns true so skip all this
// for now.
#if 0
map<perm_string,PUdp*>::const_iterator udp = pform_primitives.find(type_); map<perm_string,PUdp*>::const_iterator udp = pform_primitives.find(type_);
if (udp != pform_primitives.end()) if (udp != pform_primitives.end())
return elaborate_sig_udp_(des, scope, (*udp).second); return elaborate_sig_udp_(des, scope, (*udp).second);
#endif
return true; return true;
} }

6
emit.cc
View File

@ -31,7 +31,7 @@
# include <cassert> # include <cassert>
# include <cstring> # include <cstring>
bool NetNode::emit_node(struct target_t*tgt) const bool NetNode::emit_node(struct target_t*) const
{ {
cerr << "EMIT: Gate type? " << typeid(*this).name() << endl; cerr << "EMIT: Gate type? " << typeid(*this).name() << endl;
return false; return false;
@ -200,7 +200,7 @@ bool NetAnalogTop::emit(struct target_t*tgt) const
return tgt->process(this); return tgt->process(this);
} }
bool NetProc::emit_proc(struct target_t*tgt) const bool NetProc::emit_proc(struct target_t*) const
{ {
cerr << "EMIT: Proc type? " << typeid(*this).name() << endl; cerr << "EMIT: Proc type? " << typeid(*this).name() << endl;
return false; return false;
@ -531,7 +531,7 @@ void NetECRealParam::expr_scan(struct expr_scan_t*tgt) const
tgt->expr_rparam(this); tgt->expr_rparam(this);
} }
void NetEParam::expr_scan(struct expr_scan_t*tgt) const void NetEParam::expr_scan(struct expr_scan_t*) const
{ {
cerr << get_fileline() << ":internal error: unexpected NetEParam." cerr << get_fileline() << ":internal error: unexpected NetEParam."
<< endl; << endl;

672
eval_tree.cc
View File

File diff suppressed because it is too large Load Diff

15
expr_synth.cc
View File

@ -39,8 +39,7 @@ static NetNet* convert_to_real_const(Design*des, NetScope*scope, NetEConst*expr)
/* Note that lsig, rsig and real_args are references. */ /* Note that lsig, rsig and real_args are references. */
static bool process_binary_args(Design*des, NetScope*scope, NetExpr*root, static bool process_binary_args(Design*des, NetScope*scope, NetExpr*root,
NetExpr*left, NetExpr*right, NetExpr*left, NetExpr*right,
NetNet*&lsig, NetNet*&rsig, bool&real_args, NetNet*&lsig, NetNet*&rsig, bool&real_args)
NetExpr*obj)
{ {
if (left->expr_type() == IVL_VT_REAL || if (left->expr_type() == IVL_VT_REAL ||
right->expr_type() == IVL_VT_REAL) { right->expr_type() == IVL_VT_REAL) {
@ -77,7 +76,7 @@ static bool process_binary_args(Design*des, NetScope*scope, NetExpr*root,
else return false; else return false;
} }
NetNet* NetExpr::synthesize(Design*des, NetScope*scope, NetExpr*root) NetNet* NetExpr::synthesize(Design*des, NetScope*, NetExpr*)
{ {
cerr << get_fileline() << ": internal error: cannot synthesize expression: " cerr << get_fileline() << ": internal error: cannot synthesize expression: "
<< *this << endl; << *this << endl;
@ -95,7 +94,7 @@ NetNet* NetEBAdd::synthesize(Design*des, NetScope*scope, NetExpr*root)
NetNet *lsig=0, *rsig=0; NetNet *lsig=0, *rsig=0;
bool real_args=false; bool real_args=false;
if (process_binary_args(des, scope, root, left_, right_, lsig, rsig, if (process_binary_args(des, scope, root, left_, right_, lsig, rsig,
real_args, this)) { real_args)) {
return 0; return 0;
} }
@ -221,7 +220,7 @@ NetNet* NetEBComp::synthesize(Design*des, NetScope*scope, NetExpr*root)
unsigned width; unsigned width;
bool real_args=false; bool real_args=false;
if (process_binary_args(des, scope, root, left_, right_, lsig, rsig, if (process_binary_args(des, scope, root, left_, right_, lsig, rsig,
real_args, this)) { real_args)) {
return 0; return 0;
} }
@ -370,7 +369,7 @@ NetNet* NetEBPow::synthesize(Design*des, NetScope*scope, NetExpr*root)
unsigned width; unsigned width;
bool real_args=false; bool real_args=false;
if (process_binary_args(des, scope, root, left_, right_, lsig, rsig, if (process_binary_args(des, scope, root, left_, right_, lsig, rsig,
real_args, this)) { real_args)) {
return 0; return 0;
} }
@ -406,7 +405,7 @@ NetNet* NetEBMult::synthesize(Design*des, NetScope*scope, NetExpr*root)
unsigned width; unsigned width;
bool real_args=false; bool real_args=false;
if (process_binary_args(des, scope, root, left_, right_, lsig, rsig, if (process_binary_args(des, scope, root, left_, right_, lsig, rsig,
real_args, this)) { real_args)) {
return 0; return 0;
} }
@ -443,7 +442,7 @@ NetNet* NetEBDiv::synthesize(Design*des, NetScope*scope, NetExpr*root)
unsigned width; unsigned width;
bool real_args=false; bool real_args=false;
if (process_binary_args(des, scope, root, left_, right_, lsig, rsig, if (process_binary_args(des, scope, root, left_, right_, lsig, rsig,
real_args, this)) { real_args)) {
return 0; return 0;
} }

2
functor.cc
View File

@ -244,7 +244,7 @@ proc_match_t::~proc_match_t()
{ {
} }
int NetProc::match_proc(proc_match_t*that) int NetProc::match_proc(proc_match_t*)
{ {
return 0; return 0;
} }

3
iverilog-vpi.sh
View File

@ -22,6 +22,7 @@
CC="@IVCC@" CC="@IVCC@"
CXX=@IVCXX@ CXX=@IVCXX@
CFLAGS="@PIC@ @IVCFLAGS@ -I@INCLUDEDIR@" CFLAGS="@PIC@ @IVCFLAGS@ -I@INCLUDEDIR@"
CXXFLAGS="@PIC@ @IVCXXFLAGS@ -I@INCLUDEDIR@"
SUFFIX=@SUFFIX@ SUFFIX=@SUFFIX@
@ -136,7 +137,7 @@ do
obj=$base".o" obj=$base".o"
echo "Compiling $src..." echo "Compiling $src..."
$CXX -c -o $obj $DEFS $CFLAGS $INCOPT $src || compile_errors=`expr $compile_errors + 1` $CXX -c -o $obj $DEFS $CXXFLAGS $INCOPT $src || compile_errors=`expr $compile_errors + 1`
OBJ="$OBJ $obj" OBJ="$OBJ $obj"
done done

6
lexor_keyword.gperf
View File

@ -1,3 +1,9 @@
/*
* We need this to prevent -Wextra (-W) from complaining that the mask and
* tokenType values are not initialized for the empty table entries.
*/
%define initializer-suffix ,0,0
%{ %{
/* Command-line: gperf -o -i 1 -C -k 1-3,$ -L C -H keyword_hash -N check_identifier -tT lexor_keyword.gperf */ /* Command-line: gperf -o -i 1 -C -k 1-3,$ -L C -H keyword_hash -N check_identifier -tT lexor_keyword.gperf */

24
net_nex_input.cc
View File

@ -1,5 +1,5 @@
/* /*
* Copyright (c) 2002-2008 Stephen Williams (steve@icarus.com) * Copyright (c) 2002-2010 Stephen Williams (steve@icarus.com)
* *
* This source code is free software; you can redistribute it * This source code is free software; you can redistribute it
* and/or modify it in source code form under the terms of the GNU * and/or modify it in source code form under the terms of the GNU
@ -27,7 +27,7 @@
# include "netlist.h" # include "netlist.h"
# include "netmisc.h" # include "netmisc.h"
NexusSet* NetExpr::nex_input(bool rem_out) NexusSet* NetExpr::nex_input(bool)
{ {
cerr << get_fileline() cerr << get_fileline()
<< ": internal error: nex_input not implemented: " << ": internal error: nex_input not implemented: "
@ -35,7 +35,7 @@ NexusSet* NetExpr::nex_input(bool rem_out)
return 0; return 0;
} }
NexusSet* NetProc::nex_input(bool rem_out) NexusSet* NetProc::nex_input(bool)
{ {
cerr << get_fileline() cerr << get_fileline()
<< ": internal error: NetProc::nex_input not implemented" << ": internal error: NetProc::nex_input not implemented"
@ -68,7 +68,7 @@ NexusSet* NetEConcat::nex_input(bool rem_out)
return result; return result;
} }
NexusSet* NetEAccess::nex_input(bool rem_out) NexusSet* NetEAccess::nex_input(bool)
{ {
return new NexusSet; return new NexusSet;
} }
@ -76,12 +76,12 @@ NexusSet* NetEAccess::nex_input(bool rem_out)
/* /*
* A constant has not inputs, so always return an empty set. * A constant has not inputs, so always return an empty set.
*/ */
NexusSet* NetEConst::nex_input(bool rem_out) NexusSet* NetEConst::nex_input(bool)
{ {
return new NexusSet; return new NexusSet;
} }
NexusSet* NetECReal::nex_input(bool rem_out) NexusSet* NetECReal::nex_input(bool)
{ {
return new NexusSet; return new NexusSet;
} }
@ -90,17 +90,17 @@ NexusSet* NetECReal::nex_input(bool rem_out)
* A parameter by definition has no inputs. It represents a constant * A parameter by definition has no inputs. It represents a constant
* value, even if that value is a constant expression. * value, even if that value is a constant expression.
*/ */
NexusSet* NetEParam::nex_input(bool rem_out) NexusSet* NetEParam::nex_input(bool)
{ {
return new NexusSet; return new NexusSet;
} }
NexusSet* NetEEvent::nex_input(bool rem_out) NexusSet* NetEEvent::nex_input(bool)
{ {
return new NexusSet; return new NexusSet;
} }
NexusSet* NetEScope::nex_input(bool rem_out) NexusSet* NetEScope::nex_input(bool)
{ {
return new NexusSet; return new NexusSet;
} }
@ -324,7 +324,7 @@ NexusSet* NetCase::nex_input(bool rem_out)
return result; return result;
} }
NexusSet* NetCAssign::nex_input(bool rem_out) NexusSet* NetCAssign::nex_input(bool)
{ {
cerr << get_fileline() << ": internal warning: NetCAssign::nex_input()" cerr << get_fileline() << ": internal warning: NetCAssign::nex_input()"
<< " not implemented." << endl; << " not implemented." << endl;
@ -349,7 +349,7 @@ NexusSet* NetCondit::nex_input(bool rem_out)
return result; return result;
} }
NexusSet* NetForce::nex_input(bool rem_out) NexusSet* NetForce::nex_input(bool)
{ {
cerr << get_fileline() << ": internal warning: NetForce::nex_input()" cerr << get_fileline() << ": internal warning: NetForce::nex_input()"
<< " not implemented." << endl; << " not implemented." << endl;
@ -407,7 +407,7 @@ NexusSet* NetSTask::nex_input(bool rem_out)
* parameters to consider, because the compiler already removed them * parameters to consider, because the compiler already removed them
* and converted them to blocking assignments. * and converted them to blocking assignments.
*/ */
NexusSet* NetUTask::nex_input(bool rem_out) NexusSet* NetUTask::nex_input(bool)
{ {
return new NexusSet; return new NexusSet;
} }

8
net_nex_output.cc
View File

@ -1,5 +1,5 @@
/* /*
* Copyright (c) 2002-2007 Stephen Williams (steve@icarus.com) * Copyright (c) 2002-2010 Stephen Williams (steve@icarus.com)
* *
* This source code is free software; you can redistribute it * This source code is free software; you can redistribute it
* and/or modify it in source code form under the terms of the GNU * and/or modify it in source code form under the terms of the GNU
@ -26,7 +26,7 @@
# include "netlist.h" # include "netlist.h"
# include "netmisc.h" # include "netmisc.h"
void NetProc::nex_output(NexusSet&out) void NetProc::nex_output(NexusSet&)
{ {
cerr << get_fileline() cerr << get_fileline()
<< ": internal error: NetProc::nex_output not implemented" << ": internal error: NetProc::nex_output not implemented"
@ -108,7 +108,7 @@ void NetPDelay::nex_output(NexusSet&out)
* all. This is OK because most system tasks are not synthesizable in * all. This is OK because most system tasks are not synthesizable in
* the first place. * the first place.
*/ */
void NetSTask::nex_output(NexusSet&out) void NetSTask::nex_output(NexusSet&)
{ {
} }
@ -117,7 +117,7 @@ void NetSTask::nex_output(NexusSet&out)
* right, we should be listing as outputs all the output ports, but for * right, we should be listing as outputs all the output ports, but for
* the purposes that this method is used, this will do for now. * the purposes that this method is used, this will do for now.
*/ */
void NetUTask::nex_output(NexusSet&out) void NetUTask::nex_output(NexusSet&)
{ {
} }

6
netlist.h
View File

@ -3405,14 +3405,13 @@ class NetEBComp : public NetEBinary {
NetEConst* must_be_leeq_(NetExpr*le, const verinum&rv, bool eq_flag); NetEConst* must_be_leeq_(NetExpr*le, const verinum&rv, bool eq_flag);
NetEConst*eval_eqeq_(bool ne_flag); NetEConst*eval_eqeq_(bool ne_flag);
NetEConst*eval_eqeq_real_(NetExpr*le, NetExpr*ri, bool ne_flag); NetEConst*eval_eqeq_real_(bool ne_flag);
NetEConst*eval_less_(); NetEConst*eval_less_();
NetEConst*eval_leeq_(); NetEConst*eval_leeq_();
NetEConst*eval_leeq_real_(NetExpr*le, NetExpr*ri, bool eq_flag); NetEConst*eval_leeq_real_(NetExpr*le, NetExpr*ri, bool eq_flag);
NetEConst*eval_gt_(); NetEConst*eval_gt_();
NetEConst*eval_gteq_(); NetEConst*eval_gteq_();
NetEConst*eval_eqeqeq_(); NetEConst*eval_eqeqeq_(bool ne_flag);
NetEConst*eval_neeqeq_();
}; };
/* /*
@ -3434,6 +3433,7 @@ class NetEBLogic : public NetEBinary {
virtual NetNet* synthesize(Design*, NetScope*scope, NetExpr*root); virtual NetNet* synthesize(Design*, NetScope*scope, NetExpr*root);
private: private:
NetEConst* eval_tree_real_();
}; };
/* /*

12
netmisc.cc
View File

@ -26,11 +26,14 @@
# include "pform_types.h" # include "pform_types.h"
# include "ivl_assert.h" # include "ivl_assert.h"
// This routines is not currently used!
#if 0
NetNet* add_to_net(Design*des, NetNet*sig, long val) NetNet* add_to_net(Design*des, NetNet*sig, long val)
{ {
if (val == 0) if (val == 0)
return sig; return sig;
#if 0 cerr << sig->get_fileline() << ": XXXX: Forgot how to implement add_to_net" << endl;
return 0;
NetScope*scope = sig->scope(); NetScope*scope = sig->scope();
unsigned long abs_val = (val >= 0)? val : (-val); unsigned long abs_val = (val >= 0)? val : (-val);
unsigned width = sig->pin_count(); unsigned width = sig->pin_count();
@ -70,11 +73,8 @@ NetNet* add_to_net(Design*des, NetNet*sig, long val)
des->add_node(val_c); des->add_node(val_c);
return res; return res;
#else
cerr << sig->get_fileline() << ": XXXX: Forgot how to implement add_to_net" << endl;
return 0;
#endif
} }
#endif
NetNet* sub_net_from(Design*des, NetScope*scope, long val, NetNet*sig) NetNet* sub_net_from(Design*des, NetScope*scope, long val, NetNet*sig)
{ {
@ -657,7 +657,7 @@ const_bool const_logical(const NetExpr*expr)
for (unsigned idx = 0; idx < cval.len(); idx += 1) { for (unsigned idx = 0; idx < cval.len(); idx += 1) {
switch (cval.get(idx)) { switch (cval.get(idx)) {
case verinum::V1: case verinum::V1:
res = C_1; return C_1;
break; break;
case verinum::V0: case verinum::V0:

4
netmisc.h
View File

@ -107,8 +107,12 @@ extern NetExpr*normalize_variable_array_base(NetExpr *base, long offset,
* This function takes as input a NetNet signal and adds a constant * This function takes as input a NetNet signal and adds a constant
* value to it. If the val is 0, then simply return sig. Otherwise, * value to it. If the val is 0, then simply return sig. Otherwise,
* return a new NetNet value that is the output of an addition. * return a new NetNet value that is the output of an addition.
*
* Not currently used.
*/ */
#if 0
extern NetNet*add_to_net(Design*des, NetNet*sig, long val); extern NetNet*add_to_net(Design*des, NetNet*sig, long val);
#endif
extern NetNet*sub_net_from(Design*des, NetScope*scope, long val, NetNet*sig); extern NetNet*sub_net_from(Design*des, NetScope*scope, long val, NetNet*sig);
/* /*

4
nodangle.cc
View File

@ -40,7 +40,7 @@ class nodangle_f : public functor_t {
bool scomplete, ecomplete; bool scomplete, ecomplete;
}; };
void nodangle_f::event(Design*des, NetEvent*ev) void nodangle_f::event(Design*, NetEvent*ev)
{ {
if (ecomplete) return; if (ecomplete) return;
@ -122,7 +122,7 @@ void nodangle_f::event(Design*des, NetEvent*ev)
} }
} }
void nodangle_f::signal(Design*des, NetNet*sig) void nodangle_f::signal(Design*, NetNet*sig)
{ {
if (scomplete) return; if (scomplete) return;

37
set_width.cc
View File

@ -103,7 +103,7 @@ bool NetEBAdd::set_width(unsigned w, bool)
} }
expr_width(wid); expr_width(wid);
return wid == w; return w == wid;
} }
void NetEBAdd::cast_signed(bool sign_flag) void NetEBAdd::cast_signed(bool sign_flag)
@ -168,7 +168,7 @@ bool NetEBBits::set_width(unsigned w, bool)
*/ */
bool NetEBComp::set_width(unsigned w, bool) bool NetEBComp::set_width(unsigned w, bool)
{ {
return (w == 1); return w == 1;
} }
/* /*
@ -199,7 +199,7 @@ bool NetEBLogic::set_width(unsigned w, bool)
flag = left_->set_width(right_->expr_width()); flag = left_->set_width(right_->expr_width());
if (!flag) if (!flag)
flag = right_->set_width(left_->expr_width()); flag = right_->set_width(left_->expr_width());
return (w == 1); return w == 1;
} }
/* /*
@ -230,7 +230,7 @@ void NetEBMult::cast_signed(bool sign_flag)
cast_signed_base_(sign_flag); cast_signed_base_(sign_flag);
} }
bool NetEBPow::set_width(unsigned w, bool last_chance) bool NetEBPow::set_width(unsigned w, bool)
{ {
return w == expr_width(); return w == expr_width();
} }
@ -242,8 +242,6 @@ bool NetEBPow::set_width(unsigned w, bool last_chance)
*/ */
bool NetEBShift::set_width(unsigned w, bool) bool NetEBShift::set_width(unsigned w, bool)
{ {
bool flag = true;
switch (op()) { switch (op()) {
case 'l': case 'l':
@ -263,9 +261,8 @@ bool NetEBShift::set_width(unsigned w, bool)
} }
expr_width(left_->expr_width()); expr_width(left_->expr_width());
flag = expr_width() == w;
return flag; return w == expr_width();
} }
/* /*
@ -287,8 +284,7 @@ bool NetEConcat::set_width(unsigned w, bool)
sum *= repeat(); sum *= repeat();
expr_width(sum); expr_width(sum);
if (sum != w) return false; return w == sum;
return true;
} }
bool NetEConst::set_width(unsigned w, bool last_chance) bool NetEConst::set_width(unsigned w, bool last_chance)
@ -365,7 +361,7 @@ bool NetEConst::set_width(unsigned w, bool last_chance)
tmp.has_sign(value_.has_sign()); tmp.has_sign(value_.has_sign());
value_ = tmp; value_ = tmp;
expr_width(use_w); expr_width(use_w);
return use_w == w; return w == use_w;
} }
} }
@ -409,12 +405,9 @@ bool NetEParam::set_width(unsigned, bool)
return false; return false;
} }
bool NetESelect::set_width(unsigned w, bool) bool NetESelect::set_width(unsigned, bool)
{ {
if (expr_width() == 1) return expr_width() == 1;
return true;
else
return false;
} }
bool NetESFunc::set_width(unsigned w, bool) bool NetESFunc::set_width(unsigned w, bool)
@ -428,10 +421,7 @@ bool NetESFunc::set_width(unsigned w, bool)
*/ */
bool NetESignal::set_width(unsigned w, bool) bool NetESignal::set_width(unsigned w, bool)
{ {
if (w != vector_width()) return w == vector_width();
return false;
return true;
} }
bool NetETernary::set_width(unsigned w, bool last_chance) bool NetETernary::set_width(unsigned w, bool last_chance)
@ -460,12 +450,9 @@ bool NetETernary::set_width(unsigned w, bool last_chance)
* width. What I really need to do is note the width of the output * width. What I really need to do is note the width of the output
* parameter of the function definition and take that into account. * parameter of the function definition and take that into account.
*/ */
bool NetEUFunc::set_width(unsigned wid, bool) bool NetEUFunc::set_width(unsigned w, bool)
{ {
if (result_sig_->expr_width() == wid) return w == result_sig_->expr_width();
return true;
else
return false;
} }
bool NetEUnary::set_width(unsigned w, bool) bool NetEUnary::set_width(unsigned w, bool)

15
syn-rules.y
View File

@ -1,7 +1,7 @@
%{ %{
/* /*
* Copyright (c) 2000-2008 Stephen Williams (steve@icarus.com) * Copyright (c) 2000-2010 Stephen Williams (steve@icarus.com)
* *
* This source code is free software; you can redistribute it * This source code is free software; you can redistribute it
* and/or modify it in source code form under the terms of the GNU * and/or modify it in source code form under the terms of the GNU
@ -53,7 +53,7 @@ static int yylex();
static void yyerror(const char*); static void yyerror(const char*);
static Design*des_; static Design*des_;
static void make_DFF_CE(Design*des, NetProcTop*top, NetEvWait*wclk, static void make_DFF_CE(Design*des, NetProcTop*top,
NetEvent*eclk, NetExpr*cexp, NetAssignBase*asn); NetEvent*eclk, NetExpr*cexp, NetAssignBase*asn);
%} %}
@ -80,13 +80,11 @@ start
flip-flops. */ flip-flops. */
: S_ALWAYS '@' '(' S_EVENT ')' S_ASSIGN ';' : S_ALWAYS '@' '(' S_EVENT ')' S_ASSIGN ';'
{ make_DFF_CE(des_, $1->top, $2->evwait, $4->event, { make_DFF_CE(des_, $1->top, $4->event, 0, $6->assign);
0, $6->assign);
} }
| S_ALWAYS '@' '(' S_EVENT ')' S_IF S_EXPR S_ASSIGN ';' ';' | S_ALWAYS '@' '(' S_EVENT ')' S_IF S_EXPR S_ASSIGN ';' ';'
{ make_DFF_CE(des_, $1->top, $2->evwait, $4->event, { make_DFF_CE(des_, $1->top, $4->event, $7->expr, $8->assign);
$7->expr, $8->assign);
} }
/* Unconditional assignments in initial blocks should be made into /* Unconditional assignments in initial blocks should be made into
@ -102,6 +100,7 @@ static void hookup_DFF_CE(NetFF*ff, NetESignal*d, NetEvProbe*pclk,
NetNet*ce, NetAssign_*a, unsigned rval_pinoffset) NetNet*ce, NetAssign_*a, unsigned rval_pinoffset)
{ {
assert(rval_pinoffset == 0);
// a->sig() is a *NetNet, which doesn't have the loff_ and // a->sig() is a *NetNet, which doesn't have the loff_ and
// lwid_ context. Add the correction for loff_ ourselves. // lwid_ context. Add the correction for loff_ ourselves.
@ -129,7 +128,7 @@ static void hookup_DFF_CE(NetFF*ff, NetESignal*d, NetEvProbe*pclk,
a->turn_sig_to_wire_on_release(); a->turn_sig_to_wire_on_release();
} }
static void make_DFF_CE(Design*des, NetProcTop*top, NetEvWait*wclk, static void make_DFF_CE(Design*des, NetProcTop*top,
NetEvent*eclk, NetExpr*cexp, NetAssignBase*asn) NetEvent*eclk, NetExpr*cexp, NetAssignBase*asn)
{ {
assert(asn); assert(asn);
@ -335,7 +334,7 @@ static int yylex()
struct syn_rules_f : public functor_t { struct syn_rules_f : public functor_t {
~syn_rules_f() { } ~syn_rules_f() { }
void process(class Design*des, class NetProcTop*top) void process(class Design*, class NetProcTop*top)
{ {
/* If the scope that contains this process as a cell /* If the scope that contains this process as a cell
attribute attached to it, then skip synthesis. */ attribute attached to it, then skip synthesis. */

53
synth2.cc
View File

@ -26,13 +26,12 @@
# include <cassert> # include <cassert>
bool NetProc::synth_async(Design*des, NetScope*scope, bool NetProc::synth_async(Design*, NetScope*, const NetBus&, NetBus&)
const NetBus&nex_map, NetBus&nex_out)
{ {
return false; return false;
} }
bool NetProc::synth_sync(Design*des, NetScope*scope, NetFF*ff, bool NetProc::synth_sync(Design*des, NetScope*scope, NetFF* /*ff*/,
const NetBus&nex_map, NetBus&nex_out, const NetBus&nex_map, NetBus&nex_out,
const svector<NetEvProbe*>&events) const svector<NetEvProbe*>&events)
{ {
@ -58,7 +57,7 @@ bool NetProc::synth_sync(Design*des, NetScope*scope, NetFF*ff,
* r-value. * r-value.
*/ */
bool NetAssignBase::synth_async(Design*des, NetScope*scope, bool NetAssignBase::synth_async(Design*des, NetScope*scope,
const NetBus&nex_map, NetBus&nex_out) const NetBus& /*nex_map*/, NetBus&nex_out)
{ {
NetNet*rsig = rval_->synthesize(des, scope, rval_); NetNet*rsig = rval_->synthesize(des, scope, rval_);
assert(rsig); assert(rsig);
@ -152,7 +151,7 @@ bool NetBlock::synth_async(Design*des, NetScope*scope,
} }
bool NetCase::synth_async(Design*des, NetScope*scope, bool NetCase::synth_async(Design*des, NetScope*scope,
const NetBus&nex_map, NetBus&nex_out) const NetBus& /*nex_map*/, NetBus&nex_out)
{ {
/* Synthesize the select expression. */ /* Synthesize the select expression. */
NetNet*esig = expr_->synthesize(des, scope, expr_); NetNet*esig = expr_->synthesize(des, scope, expr_);
@ -237,9 +236,13 @@ bool NetCase::synth_async(Design*des, NetScope*scope,
return true; return true;
} }
bool NetCondit::synth_async(Design*des, NetScope*scope, bool NetCondit::synth_async(Design*des, NetScope* /*scope*/,
const NetBus&nex_map, NetBus&nex_out) const NetBus& /*nex_map*/, NetBus& /*nex_out*/)
{ {
cerr << get_fileline() << ": sorry: "
<< "Forgot to implement NetCondit::synth_async" << endl;
des->errors += 1;
return false;
#if 0 #if 0
NetNet*ssig = expr_->synthesize(des); NetNet*ssig = expr_->synthesize(des);
assert(ssig); assert(ssig);
@ -295,11 +298,6 @@ bool NetCondit::synth_async(Design*des, NetScope*scope,
DEBUG_SYNTH2_EXIT("NetCondit",true) DEBUG_SYNTH2_EXIT("NetCondit",true)
return true; return true;
#else
cerr << get_fileline() << ": sorry: "
<< "Forgot to implement NetCondit::synth_async" << endl;
des->errors += 1;
return false;
#endif #endif
} }
@ -351,13 +349,17 @@ bool NetProcTop::synth_async(Design*des)
* This needs to be split into a DFF bank for each statement, because * This needs to be split into a DFF bank for each statement, because
* the statements may each infer different reset and enable signals. * the statements may each infer different reset and enable signals.
*/ */
bool NetBlock::synth_sync(Design*des, NetScope*scope, NetFF*ff, bool NetBlock::synth_sync(Design*des, NetScope* /*scope*/, NetFF* /*ff*/,
const NetBus&nex_map, NetBus&nex_out, const NetBus& /*nex_map*/, NetBus& /*nex_out*/,
const svector<NetEvProbe*>&events_in) const svector<NetEvProbe*>& /*events_in*/)
{ {
if (last_ == 0) { if (last_ == 0) {
return true; return true;
} }
cerr << get_fileline() << ": sorry: "
<< "Forgot to implement NetBlock::synth_sync" << endl;
des->errors += 1;
return false;
#if 0 #if 0
bool flag = true; bool flag = true;
@ -503,12 +505,6 @@ bool NetBlock::synth_sync(Design*des, NetScope*scope, NetFF*ff,
return flag; return flag;
#else
cerr << get_fileline() << ": sorry: "
<< "Forgot to implement NetBlock::synth_sync"
<< endl;
des->errors += 1;
return false;
#endif #endif
} }
@ -518,10 +514,14 @@ bool NetBlock::synth_sync(Design*des, NetScope*scope, NetFF*ff,
* asynchronous set/reset, depending on whether the pin of the * asynchronous set/reset, depending on whether the pin of the
* expression is connected to an event, or not. * expression is connected to an event, or not.
*/ */
bool NetCondit::synth_sync(Design*des, NetScope*scope, NetFF*ff, bool NetCondit::synth_sync(Design*des, NetScope* /*scope*/, NetFF* /*ff*/,
const NetBus&nex_map, NetBus&nex_out, const NetBus& /*nex_map*/, NetBus& /*nex_out*/,
const svector<NetEvProbe*>&events_in) const svector<NetEvProbe*>& /*events_in*/)
{ {
cerr << get_fileline() << ": sorry: "
<< "Forgot to implement NetCondit::synth_sync" << endl;
des->errors += 1;
return false;
#if 0 #if 0
/* First try to turn the condition expression into an /* First try to turn the condition expression into an
asynchronous set/reset. If the condition expression has asynchronous set/reset. If the condition expression has
@ -726,11 +726,6 @@ bool NetCondit::synth_sync(Design*des, NetScope*scope, NetFF*ff,
return flag; return flag;
#else
cerr << get_fileline() << ": sorry: "
<< "Forgot to implement NetCondit::synth_sync" << endl;
des->errors += 1;
return false;
#endif #endif
} }

4
t-dll.cc
View File

@ -363,7 +363,7 @@ static void nexus_lpm_add(ivl_nexus_t nex, ivl_lpm_t net, unsigned pin,
nex->ptrs_[top].type_= __NEXUS_PTR_LPM; nex->ptrs_[top].type_= __NEXUS_PTR_LPM;
nex->ptrs_[top].drive0 = drive0; nex->ptrs_[top].drive0 = drive0;
nex->ptrs_[top].drive1 = drive0; nex->ptrs_[top].drive1 = drive1;
nex->ptrs_[top].pin_ = pin; nex->ptrs_[top].pin_ = pin;
nex->ptrs_[top].l.lpm= net; nex->ptrs_[top].l.lpm= net;
} }
@ -2210,7 +2210,7 @@ bool dll_target::net_literal(const NetLiteral*net)
return true; return true;
} }
void dll_target::net_probe(const NetEvProbe*net) void dll_target::net_probe(const NetEvProbe*)
{ {
} }

14
target.cc
View File

@ -1,5 +1,5 @@
/* /*
* Copyright (c) 1998-2008 Stephen Williams <steve@icarus.com> * Copyright (c) 1998-2010 Stephen Williams <steve@icarus.com>
* *
* This source code is free software; you can redistribute it * This source code is free software; you can redistribute it
* and/or modify it in source code form under the terms of the GNU * and/or modify it in source code form under the terms of the GNU
@ -217,14 +217,14 @@ bool target_t::net_const(const NetConst*)
return false; return false;
} }
bool target_t::net_sysfunction(const NetSysFunc*net) bool target_t::net_sysfunction(const NetSysFunc*)
{ {
cerr << "target (" << typeid(*this).name() << "): " cerr << "target (" << typeid(*this).name() << "): "
"Unhandled NetSysFunc node." << endl; "Unhandled NetSysFunc node." << endl;
return false; return false;
} }
bool target_t::net_function(const NetUserFunc*net) bool target_t::net_function(const NetUserFunc*)
{ {
cerr << "target (" << typeid(*this).name() << "): " cerr << "target (" << typeid(*this).name() << "): "
"Unhandled NetUserFunc node." << endl; "Unhandled NetUserFunc node." << endl;
@ -245,21 +245,21 @@ void target_t::net_probe(const NetEvProbe*net)
net->dump_node(cerr, 4); net->dump_node(cerr, 4);
} }
bool target_t::sign_extend(const NetSignExtend*net) bool target_t::sign_extend(const NetSignExtend*)
{ {
cerr << "target (" << typeid(*this).name() << "): " cerr << "target (" << typeid(*this).name() << "): "
"Unhandled NetSignExtend node." << endl; "Unhandled NetSignExtend node." << endl;
return false; return false;
} }
bool target_t::process(const NetProcTop*top) bool target_t::process(const NetProcTop*)
{ {
cerr << "target (" << typeid(*this).name() << "): " cerr << "target (" << typeid(*this).name() << "): "
"Unhandled process(NetProcTop)." << endl; "Unhandled process(NetProcTop)." << endl;
return false; return false;
} }
bool target_t::process(const NetAnalogTop*top) bool target_t::process(const NetAnalogTop*)
{ {
cerr << "target (" << typeid(*this).name() << "): " cerr << "target (" << typeid(*this).name() << "): "
"Unhandled process(NetAnalogTop)." << endl; "Unhandled process(NetAnalogTop)." << endl;
@ -346,7 +346,7 @@ bool target_t::proc_disable(const NetDisable*obj)
return false; return false;
} }
bool target_t::proc_force(const NetForce*dev) bool target_t::proc_force(const NetForce*)
{ {
cerr << "target (" << typeid(*this).name() << "): " cerr << "target (" << typeid(*this).name() << "): "
"Unhandled proc_force." << endl; "Unhandled proc_force." << endl;

2
verinum.cc
View File

@ -170,7 +170,7 @@ verinum::verinum(uint64_t val, unsigned n)
/* The second argument is not used! It is there to make this /* The second argument is not used! It is there to make this
* constructor unique. */ * constructor unique. */
verinum::verinum(double val, bool dummy) verinum::verinum(double val, bool)
: has_len_(false), has_sign_(true), string_flag_(false) : has_len_(false), has_sign_(true), string_flag_(false)
{ {
bool is_neg = false; bool is_neg = false;

4
verinum.h
View File

@ -1,7 +1,7 @@
#ifndef __verinum_H #ifndef __verinum_H
#define __verinum_H #define __verinum_H
/* /*
* Copyright (c) 1998-2008 Stephen Williams (steve@icarus.com) * Copyright (c) 1998-2010 Stephen Williams (steve@icarus.com)
* *
* This source code is free software; you can redistribute it * This source code is free software; you can redistribute it
* and/or modify it in source code form under the terms of the GNU * and/or modify it in source code form under the terms of the GNU
@ -46,7 +46,7 @@ class verinum {
verinum(const V*v, unsigned nbits, bool has_len =true); verinum(const V*v, unsigned nbits, bool has_len =true);
verinum(V, unsigned nbits =1, bool has_len =true); verinum(V, unsigned nbits =1, bool has_len =true);
verinum(uint64_t val, unsigned bits); verinum(uint64_t val, unsigned bits);
verinum(double val, bool dummy); verinum(double val, bool);
verinum(const verinum&); verinum(const verinum&);
// Create a signed number, with an unspecified number of bits. // Create a signed number, with an unspecified number of bits.