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Generate port mappings

This commit is contained in:
Nick Gasson 2008-06-10 13:58:41 +01:00
parent 7560b29fb9
commit babe694366
3 changed files with 42 additions and 9 deletions
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9
tgt-vhdl/scope.cc
View File

@ -217,7 +217,6 @@ static void map_signal(ivl_signal_t to, vhdl_entity *parent,
ivl_nexus_ptr_t ptr = ivl_nexus_ptr(nexus, i); ivl_nexus_ptr_t ptr = ivl_nexus_ptr(nexus, i);
if ((sig = ivl_nexus_ptr_sig(ptr)) != NULL) { if ((sig = ivl_nexus_ptr_sig(ptr)) != NULL) {
const char *basename = ivl_signal_basename(sig); const char *basename = ivl_signal_basename(sig);
std::cout << "checking " << basename << std::endl;
if (sig == to) { if (sig == to) {
// Don't map a signal to itself! // Don't map a signal to itself!
continue; continue;
@ -226,8 +225,10 @@ static void map_signal(ivl_signal_t to, vhdl_entity *parent,
// It's a signal declared in the parent // It's a signal declared in the parent
// Pick this one (any one will do as they're all // Pick this one (any one will do as they're all
// connected together if there's more than one) // connected together if there's more than one)
std::cout << "= " << std::hex << sig << std::endl; vhdl_var_ref *ref =
std::cout << "-> " << ivl_signal_basename(sig) << std::endl; new vhdl_var_ref(basename, vhdl_type::std_logic());
inst->map_port(ivl_signal_basename(to), ref);
return; return;
} }
} }
@ -248,8 +249,6 @@ static void port_map(ivl_scope_t scope, vhdl_entity *parent,
for (int i = 0; i < nsigs; i++) { for (int i = 0; i < nsigs; i++) {
ivl_signal_t sig = ivl_scope_sig(scope, i); ivl_signal_t sig = ivl_scope_sig(scope, i);
const char *basename = ivl_signal_basename(sig);
ivl_signal_port_t mode = ivl_signal_port(sig); ivl_signal_port_t mode = ivl_signal_port(sig);
switch (mode) { switch (mode) {
case IVL_SIP_NONE: case IVL_SIP_NONE:

29
tgt-vhdl/vhdl_syntax.cc
View File

@ -255,11 +255,36 @@ vhdl_comp_inst::vhdl_comp_inst(const char *inst_name, const char *comp_name)
} }
void vhdl_comp_inst::map_port(const char *name, vhdl_expr *expr)
{
port_map_t pmap = { name, expr };
mapping_.push_back(pmap);
}
void vhdl_comp_inst::emit(std::ofstream &of, int level) const void vhdl_comp_inst::emit(std::ofstream &of, int level) const
{ {
// If there are no ports or generics we don't need to mention them...
emit_comment(of, level); emit_comment(of, level);
of << inst_name_ << ": " << comp_name_ << ";"; of << inst_name_ << ": " << comp_name_;
// If there are no ports or generics we don't need to mention them...
if (mapping_.size() > 0) {
newline(of, indent(level));
of << "port map (";
int sz = mapping_.size();
port_map_list_t::const_iterator it;
for (it = mapping_.begin(); it != mapping_.end(); ++it) {
newline(of, indent(indent(level)));
of << (*it).name << " => ";
(*it).expr->emit(of, level);
if (--sz > 0)
of << ",";
}
newline(of, indent(level));
of << ")";
}
of << ";";
newline(of, level); newline(of, level);
} }

13
tgt-vhdl/vhdl_syntax.hh
View File

@ -351,6 +351,15 @@ private:
vhdl_port_mode_t mode_; vhdl_port_mode_t mode_;
}; };
/*
* A mapping from port name to an expression.
*/
struct port_map_t {
std::string name;
vhdl_expr *expr;
};
typedef std::list<port_map_t> port_map_list_t;
/* /*
* Instantiation of component. This is really only a placeholder * Instantiation of component. This is really only a placeholder
@ -362,10 +371,10 @@ public:
virtual ~vhdl_comp_inst() {} virtual ~vhdl_comp_inst() {}
void emit(std::ofstream &of, int level) const; void emit(std::ofstream &of, int level) const;
void map_port(const char *name, vhdl_expr *expr);
private: private:
std::string comp_name_, inst_name_; std::string comp_name_, inst_name_;
port_map_list_t mapping_;
// TODO: Port mappings, etc.
}; };