Make some effort to preserve bits while
operating on constant values.
This commit is contained in:
steve
parent
561a268c9c
commit
bab0924d86
18
eval.cc
18
eval.cc
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@ -17,7 +17,7 @@
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* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
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*/
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#ifdef HAVE_CVS_IDENT
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#ident "$Id: eval.cc,v 1.34 2003/03/26 06:16:18 steve Exp $"
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#ident "$Id: eval.cc,v 1.35 2003/04/14 03:40:21 steve Exp $"
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#endif
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# include "config.h"
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@ -47,9 +47,7 @@ verinum* PEBinary::eval_const(const Design*des, const NetScope*scope) const
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switch (op_) {
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case '+': {
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if (l->is_defined() && r->is_defined()) {
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long lv = l->as_long();
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long rv = r->as_long();
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res = new verinum(lv+rv, l->len());
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res = new verinum(*l + *r);
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} else {
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res = new verinum(verinum::Vx, l->len());
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}
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@ -57,9 +55,7 @@ verinum* PEBinary::eval_const(const Design*des, const NetScope*scope) const
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}
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case '-': {
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if (l->is_defined() && r->is_defined()) {
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long lv = l->as_long();
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long rv = r->as_long();
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res = new verinum(lv-rv, l->len());
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res = new verinum(*l - *r);
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} else {
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res = new verinum(verinum::Vx, l->len());
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}
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@ -67,9 +63,7 @@ verinum* PEBinary::eval_const(const Design*des, const NetScope*scope) const
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}
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case '*': {
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if (l->is_defined() && r->is_defined()) {
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long lv = l->as_long();
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long rv = r->as_long();
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res = new verinum(lv * rv, l->len());
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res = new verinum(*l * *r);
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} else {
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res = new verinum(verinum::Vx, l->len());
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}
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@ -247,6 +241,10 @@ verinum* PEUnary::eval_const(const Design*des, const NetScope*scope) const
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/*
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* $Log: eval.cc,v $
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* Revision 1.35 2003/04/14 03:40:21 steve
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* Make some effort to preserve bits while
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* operating on constant values.
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*
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* Revision 1.34 2003/03/26 06:16:18 steve
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* Evaluate > and < in constant expressions.
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*
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27
eval_tree.cc
27
eval_tree.cc
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@ -17,7 +17,7 @@
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* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
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*/
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#ifdef HAVE_CVS_IDENT
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#ident "$Id: eval_tree.cc,v 1.49 2003/03/15 18:07:58 steve Exp $"
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#ident "$Id: eval_tree.cc,v 1.50 2003/04/14 03:40:21 steve Exp $"
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#endif
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# include "config.h"
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@ -706,19 +706,26 @@ NetEConst* NetEBShift::eval_tree()
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verinum rv = re->value();
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verinum lv = le->value();
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/* Calculate the width of the result. If it is not fixed, then
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get it from the left operand. */
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/* Make an early estimate of the expression width. */
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unsigned wid = expr_width();
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if (wid == 0)
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wid = left_->expr_width();
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if (rv.is_defined()) {
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unsigned shift = rv.as_ulong();
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if ((wid == 0) || ! lv.has_len()) {
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/* If the caller doesn't care what the width is,
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then calcuate a width from the trimmed left
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expression, plus the shift. This avoids
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data loss. */
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lv = trim_vnum(lv);
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wid = lv.len();
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if (op() == 'l')
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wid = lv.len() + shift;
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}
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assert(wid);
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verinum nv (verinum::V0, wid);
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verinum nv (verinum::V0, wid, lv.has_len());
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if (op() == 'r') {
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unsigned cnt = wid;
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@ -747,7 +754,9 @@ NetEConst* NetEBShift::eval_tree()
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res = new NetEConst(nv);
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} else {
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assert(wid);
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if (wid == 0)
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wid = left_->expr_width();
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verinum nv (verinum::Vx, wid);
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res = new NetEConst(nv);
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}
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@ -1242,6 +1251,10 @@ NetEConst* NetEUReduce::eval_tree()
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/*
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* $Log: eval_tree.cc,v $
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* Revision 1.50 2003/04/14 03:40:21 steve
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* Make some effort to preserve bits while
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* operating on constant values.
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*
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* Revision 1.49 2003/03/15 18:07:58 steve
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* More resilient WRT right expression width of GT.
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*
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@ -203,6 +203,34 @@ interpreted as a loop head, and this is what Icarus Verilog does, as
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well as all the other major Verilog tools, but the standard does not
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say this.
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* UNSIZED NUMERIC CONSTANTS ARE NOT LIMITED TO 32 BITS
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The Verilog standard allows Verilog implementations to limit the size
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of unsized constants to a bit width of at least 32. That means that a
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constant 17179869183 (36'h3_ffff_ffff) may overflow some compilers. In
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fact, it is common to limit these values to 32bits. However, a
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compiler may just as easily choose another width limit, for example
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64bits. That value is equally good.
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However, it is not *required* that an implementation truncate at 32
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bits, and in fact Icarus Verilog does not truncate at all. It will
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make the unsized constant as big as it needs to be to hold the value
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accurately. This is especially useful in situations like this;
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reg [width-1:0] foo = 17179869183;
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The programmer wants the constant to take on the width of the reg,
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which in this example is parameterized. Since constant sizes cannot be
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parameterized, the programmer ideally gives an unsized constant, which
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the compiler then expands/contracts to match the l-value.
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Also, by choosing to not ever truncate, Icarus Verilog can handle code
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written for a 64bit compiler as easily as for a 32bit compiler. In
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particular, any constants that the user does not expect to be
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arbitrarily truncated by his compiler will also not be truncated by
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Icarus Verilog, no matter what that other compiler chooses as a
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truncation point.
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* UNSIZED EXPRESSIONS AS PARAMETERS TO CONCATENATION {}
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@ -470,8 +498,12 @@ of 4-value behavior in the dead zone, and appears more user friendly
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when viewed by reasonable viewers.
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$Id: ieee1364-notes.txt,v 1.15 2003/02/16 23:39:08 steve Exp $
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$Id: ieee1364-notes.txt,v 1.16 2003/04/14 03:40:21 steve Exp $
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$Log: ieee1364-notes.txt,v $
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Revision 1.16 2003/04/14 03:40:21 steve
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Make some effort to preserve bits while
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operating on constant values.
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Revision 1.15 2003/02/16 23:39:08 steve
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NaN in dead zones of VCD dumps.
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89
verinum.cc
89
verinum.cc
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@ -17,7 +17,7 @@
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* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
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*/
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#ifdef HAVE_CVS_IDENT
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#ident "$Id: verinum.cc,v 1.38 2003/04/03 04:30:00 steve Exp $"
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#ident "$Id: verinum.cc,v 1.39 2003/04/14 03:40:21 steve Exp $"
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#endif
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# include "config.h"
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@ -309,7 +309,7 @@ bool verinum::is_zero() const
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* If the input value has a definite length, then that value is just
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* returned as is.
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*/
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static verinum trim_vnum(const verinum&that)
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verinum trim_vnum(const verinum&that)
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{
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unsigned tlen;
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@ -409,7 +409,7 @@ ostream& operator<< (ostream&o, const verinum&v)
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out as a decimal number. */
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if (v.is_defined()) {
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if (v.has_sign())
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o << "'sd" << v.as_ulong();
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o << "'sd" << v.as_long();
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else
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o << "'d" << v.as_ulong();
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return o;
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@ -571,8 +571,10 @@ verinum v_not(const verinum&left)
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/*
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* Addition works a bit at a time, from the least significant up to
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* the most significant. The result is signed only if either of the
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* operands is signed.
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* the most significant. The result is signed only if both of the
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* operands are signed. The result is also expanded as needed to
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* prevent overflow. It is up to the caller to shrink the result back
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* down if that is the desire.
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*/
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verinum operator + (const verinum&left, const verinum&right)
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{
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@ -582,21 +584,38 @@ verinum operator + (const verinum&left, const verinum&right)
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unsigned max = left.len();
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if (right.len() > max) max = right.len();
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verinum val (verinum::V0, max);
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val.has_sign( left.has_sign() || right.has_sign() );
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bool signed_flag = left.has_sign() && right.has_sign();
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verinum::V*val_bits = new verinum::V[max+1];
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verinum::V carry = verinum::V0;
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for (unsigned idx = 0 ; idx < min ; idx += 1)
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val.set(idx, add_with_carry(left[idx], right[idx], carry));
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val_bits[idx] = add_with_carry(left[idx], right[idx], carry);
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verinum::V rpad = signed_flag? right[right.len()-1] : verinum::V0;
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verinum::V lpad = signed_flag? left[left.len()-1] : verinum::V0;
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if (left.len() > right.len()) {
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for (unsigned idx = min ; idx < max ; idx += 1)
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val.set(idx,add_with_carry(left[idx], verinum::V0, carry));
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for (unsigned idx = min ; idx < left.len() ; idx += 1)
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val_bits[idx] = add_with_carry(left[idx], rpad, carry);
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} else {
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for (unsigned idx = min ; idx < max ; idx += 1)
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val.set(idx, add_with_carry(verinum::V0, right[idx], carry));
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for (unsigned idx = min ; idx < right.len() ; idx += 1)
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val_bits[idx] = add_with_carry(lpad, right[idx], carry);
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}
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if (signed_flag) {
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val_bits[max] = add_with_carry(lpad, rpad, carry);
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if (val_bits[max] != val_bits[max-1])
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max += 1;
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}
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verinum val (val_bits, max, false);
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val.has_sign(signed_flag);
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delete[]val_bits;
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return val;
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}
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@ -826,6 +845,10 @@ verinum::V operator & (verinum::V l, verinum::V r)
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/*
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* $Log: verinum.cc,v $
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* Revision 1.39 2003/04/14 03:40:21 steve
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* Make some effort to preserve bits while
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* operating on constant values.
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*
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* Revision 1.38 2003/04/03 04:30:00 steve
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* Prevent overrun comparing verinums to zero.
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*
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@ -872,47 +895,5 @@ verinum::V operator & (verinum::V l, verinum::V r)
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*
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* Revision 1.24 2001/02/07 21:47:13 steve
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* Fix expression widths for rvalues and parameters (PR#131,132)
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*
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* Revision 1.23 2001/02/07 02:46:31 steve
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* Support constant evaluation of / and % (PR#124)
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*
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* Revision 1.22 2001/01/02 03:23:40 steve
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* Evaluate constant &, | and unary ~.
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*
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* Revision 1.21 2000/12/10 22:01:36 steve
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* Support decimal constants in behavioral delays.
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*
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* Revision 1.20 2000/09/28 03:55:55 steve
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* handel, by truncation, verinums that are to long for long integers.
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*
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* Revision 1.19 2000/09/27 18:28:37 steve
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* multiply in parameter expressions.
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*
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* Revision 1.18 2000/09/07 22:37:10 steve
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* The + operator now preserves signedness.
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*
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* Revision 1.17 2000/06/12 03:56:51 steve
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* Fix subract of short value form long one.
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*
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* Revision 1.16 2000/02/23 04:43:43 steve
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* Some compilers do not accept the not symbol.
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*
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* Revision 1.15 2000/02/23 02:56:56 steve
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* Macintosh compilers do not support ident.
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*
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* Revision 1.14 2000/01/07 03:45:49 steve
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* Initial support for signed constants.
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*
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* Revision 1.13 2000/01/06 05:57:06 steve
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* Only sign-extend unsized numbers.
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*
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* Revision 1.12 1999/11/06 16:00:17 steve
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* Put number constants into a static table.
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*
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* Revision 1.11 1999/10/22 23:57:53 steve
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* do the <= in bits, not numbers.
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*
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* Revision 1.10 1999/10/10 23:29:37 steve
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* Support evaluating + operator at compile time.
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*/
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27
verinum.h
27
verinum.h
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@ -19,7 +19,7 @@
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* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
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*/
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#ifdef HAVE_CVS_IDENT
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#ident "$Id: verinum.h,v 1.23 2003/04/03 04:30:00 steve Exp $"
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#ident "$Id: verinum.h,v 1.24 2003/04/14 03:40:21 steve Exp $"
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#endif
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# include <string>
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@ -103,6 +103,9 @@ class verinum {
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bool string_flag_;
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};
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/* Return a verinum that is minimal. That is, it has only the length
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needed to accurately represent the contained value, signed or not. */
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extern verinum trim_vnum(const verinum&);
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extern ostream& operator<< (ostream&, const verinum&);
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extern ostream& operator<< (ostream&, verinum::V);
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@ -113,11 +116,6 @@ extern verinum::V operator & (verinum::V l, verinum::V r);
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extern verinum::V operator == (const verinum&left, const verinum&right);
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extern verinum::V operator <= (const verinum&left, const verinum&right);
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extern verinum::V operator < (const verinum&left, const verinum&right);
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extern verinum operator + (const verinum&left, const verinum&right);
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extern verinum operator - (const verinum&left, const verinum&right);
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extern verinum operator * (const verinum&left, const verinum&right);
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extern verinum operator / (const verinum&left, const verinum&right);
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extern verinum operator % (const verinum&left, const verinum&right);
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inline verinum::V operator > (const verinum&left, const verinum&right)
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{ return right < left; }
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@ -128,10 +126,27 @@ inline verinum::V operator >= (const verinum&left, const verinum&right)
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inline verinum::V operator != (const verinum&left, const verinum&right)
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{ return (left == right)? verinum::V0 : verinum::V1; }
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/* These are arithmetic operators. These generally work to produce
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results that do not overflow. That means the result may expand or
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contract to hold the bits needed to hold the operation results
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accurately. It is up to the caller to truncate or pad if a specific
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width is expected. */
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extern verinum operator + (const verinum&left, const verinum&right);
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extern verinum operator - (const verinum&left, const verinum&right);
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extern verinum operator * (const verinum&left, const verinum&right);
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extern verinum operator / (const verinum&left, const verinum&right);
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extern verinum operator % (const verinum&left, const verinum&right);
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/* Bitwise not returns the ones complement. */
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extern verinum v_not(const verinum&left);
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/*
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* $Log: verinum.h,v $
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* Revision 1.24 2003/04/14 03:40:21 steve
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* Make some effort to preserve bits while
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* operating on constant values.
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*
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* Revision 1.23 2003/04/03 04:30:00 steve
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* Prevent overrun comparing verinums to zero.
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*
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