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Merge branch 'master' of ssh://steve-icarus@icarus.com/home/u/icarus/steve/git/verilog

This commit is contained in:
Stephen Williams 2009-11-27 09:26:35 -08:00
parent 966e29db3b de1f17d429
commit ba58e57dc8
4 changed files with 58 additions and 38 deletions
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18
tgt-vvp/draw_mux.c
View File

@ -53,21 +53,21 @@ static void draw_lpm_mux_ab(ivl_lpm_t net, const char*muxz)
assert( ! number_is_unknown(d_fall));
assert( ! number_is_unknown(d_decay));
// For now .delay (x,y,z) only supports a 32 bit delay value.
if ((! number_is_immediate(d_rise, 32, 0)) ||
(! number_is_immediate(d_fall, 32, 0)) ||
(! number_is_immediate(d_decay, 32, 0))) {
fprintf(stderr, "%s:%u: vvp-tgt sorry: only 32 bit "
// .delay (x,y,z) only supports a 64 bit delay value.
if ((! number_is_immediate(d_rise, 64, 0)) ||
(! number_is_immediate(d_fall, 64, 0)) ||
(! number_is_immediate(d_decay, 64, 0))) {
fprintf(stderr, "%s:%u: vvp-tgt sorry: only 64 bit "
"delays are supported in a continuous "
"assignment.\n", ivl_expr_file(d_rise),
ivl_expr_lineno(d_rise));
exit(1);
}
fprintf(vvp_out, "L_%p .delay (%lu,%lu,%lu) L_%p/d;\n",
net, get_number_immediate(d_rise),
get_number_immediate(d_fall),
get_number_immediate(d_decay), net);
fprintf(vvp_out, "L_%p .delay (%" PRIu64 ",%" PRIu64 ",%" PRIu64 ") L_%p/d;\n",
net, get_number_immediate64(d_rise),
get_number_immediate64(d_fall),
get_number_immediate64(d_decay), net);
} else {
ivl_signal_t sig;
// We do not currently support calculating the decay from

40
tgt-vvp/vvp_scope.c
View File

@ -900,21 +900,21 @@ static void draw_logic_in_scope(ivl_net_logic_t lptr)
assert(! number_is_unknown(fall_exp));
assert(! number_is_unknown(decay_exp));
// For now .delay (x,y,z) only supports a 32 bit delay value.
if ((! number_is_immediate(rise_exp, 32, 0)) ||
(! number_is_immediate(fall_exp, 32, 0)) ||
(! number_is_immediate(decay_exp, 32, 0))) {
fprintf(stderr, "%s:%u: vvp-tgt sorry: only 32 bit "
// .delay (x,y,z) only supports a 64 bit delay value.
if ((! number_is_immediate(rise_exp, 64, 0)) ||
(! number_is_immediate(fall_exp, 64, 0)) ||
(! number_is_immediate(decay_exp, 64, 0))) {
fprintf(stderr, "%s:%u: vvp-tgt sorry: only 64 bit "
"delays are supported in a continuous "
"assignment.\n", ivl_expr_file(rise_exp),
ivl_expr_lineno(rise_exp));
exit(1);
assert(0);
}
fprintf(vvp_out, "L_%p .delay (%lu,%lu,%lu) L_%p/d;\n",
lptr, get_number_immediate(rise_exp),
get_number_immediate(fall_exp),
get_number_immediate(decay_exp), lptr);
fprintf(vvp_out, "L_%p .delay (%" PRIu64 ",%" PRIu64 ",%" PRIu64 ") L_%p/d;\n",
lptr, get_number_immediate64(rise_exp),
get_number_immediate64(fall_exp),
get_number_immediate64(decay_exp), lptr);
} else {
ivl_signal_t sig;
// We do not currently support calculating the decay from
@ -1121,22 +1121,22 @@ static const char* draw_lpm_output_delay(ivl_lpm_t net)
assert(! number_is_unknown(d_fall));
assert(! number_is_unknown(d_decay));
// For now .delay (x,y,z) only supports a 32 bit delay value.
if ((! number_is_immediate(d_rise, 32, 0)) ||
(! number_is_immediate(d_fall, 32, 0)) ||
(! number_is_immediate(d_decay, 32, 0))) {
fprintf(stderr, "%s:%u: vvp-tgt sorry: only 32 bit "
// .delay (x,y,z) only supports a 64 bit delay value.
if ((! number_is_immediate(d_rise, 64, 0)) ||
(! number_is_immediate(d_fall, 64, 0)) ||
(! number_is_immediate(d_decay, 64, 0))) {
fprintf(stderr, "%s:%u: vvp-tgt sorry: only 64 bit "
"delays are supported in a continuous "
"assignment.\n", ivl_expr_file(d_rise),
ivl_expr_lineno(d_rise));
exit(1);
assert(0);
}
dly = "/d";
fprintf(vvp_out, "L_%p .delay (%lu,%lu,%lu) L_%p/d;\n",
net, get_number_immediate(d_rise),
get_number_immediate(d_fall),
get_number_immediate(d_decay), net);
fprintf(vvp_out, "L_%p .delay (%" PRIu64 ",%" PRIu64 ",%" PRIu64 ")"
"L_%p/d;\n", net, get_number_immediate64(d_rise),
get_number_immediate64(d_fall),
get_number_immediate64(d_decay), net);
}
return dly;

22
vvp/vthread.cc
View File

@ -4205,9 +4205,9 @@ bool of_SET_X0(vthread_t thr, vvp_code_t cp)
bool of_SHIFTL_I0(vthread_t thr, vvp_code_t cp)
{
unsigned base = cp->bit_idx[0];
unsigned wid = cp->number;
long shift = thr->words[0].w_int;
int base = cp->bit_idx[0];
int wid = cp->number;
int shift = thr->words[0].w_int;
assert(base >= 4);
thr_check_addr(thr, base+wid-1);
@ -4217,7 +4217,7 @@ bool of_SHIFTL_I0(vthread_t thr, vvp_code_t cp)
vvp_vector4_t tmp (wid, BIT4_X);
thr->bits4.set_vec(base, tmp);
} else if (shift >= (long)wid) {
} else if (shift >= wid) {
// Shift is so far that all value is shifted out. Write
// in a constant 0 result.
vvp_vector4_t tmp (wid, BIT4_0);
@ -4231,9 +4231,13 @@ bool of_SHIFTL_I0(vthread_t thr, vvp_code_t cp)
vvp_vector4_t fil (shift, BIT4_0);
thr->bits4.set_vec(base, fil);
} else if (shift <= -wid) {
vvp_vector4_t tmp (wid, BIT4_X);
thr->bits4.set_vec(base, tmp);
} else if (shift < 0) {
// For a negative shift we pad with 'bx.
unsigned idx;
int idx;
for (idx = 0 ; (idx-shift) < wid ; idx += 1) {
unsigned src = base + idx - shift;
unsigned dst = base + idx;
@ -4255,9 +4259,9 @@ bool of_SHIFTL_I0(vthread_t thr, vvp_code_t cp)
*/
bool of_SHIFTR_I0(vthread_t thr, vvp_code_t cp)
{
unsigned base = cp->bit_idx[0];
unsigned wid = cp->number;
long shift = thr->words[0].w_int;
int base = cp->bit_idx[0];
int wid = cp->number;
int shift = thr->words[0].w_int;
assert(base >= 4);
thr_check_addr(thr, base+wid-1);
@ -4279,7 +4283,7 @@ bool of_SHIFTR_I0(vthread_t thr, vvp_code_t cp)
vvp_vector4_t tmp (shift, BIT4_0);
thr->bits4.set_vec(base+wid-shift, tmp);
} else if (shift < -(long)wid) {
} else if (shift < -wid) {
// Negative shift is so far that all the value is shifted out.
// Write in a constant 'bx result.
vvp_vector4_t tmp (wid, BIT4_X);

16
vvp/vvp_net.cc
View File

@ -1162,6 +1162,22 @@ void vvp_vector4_t::mov(unsigned dst, unsigned src, unsigned cnt)
if ((doff+trans) > BITS_PER_WORD)
trans = BITS_PER_WORD - doff;
if (trans == BITS_PER_WORD) {
// Special case: the transfer count is
// exactly an entire word. For this to be
// true, it must also be true that the
// pointers are aligned. The work is easy,
abits_ptr_[dptr] = abits_ptr_[sptr];
bbits_ptr_[dptr] = bbits_ptr_[sptr];
dptr += 1;
sptr += 1;
cnt -= BITS_PER_WORD;
continue;
}
// Here we know that either the source or
// destination is unaligned, and also we know that
// the count is less then a full word.
unsigned long vmask = (1UL << trans) - 1;
unsigned long tmp;