Change implementation of force/release to use filters.
This is moving towards moving force/release out of the signal class. The end-game is to remove all of the wire implementation out of the functor and into the filter. Variables will remain in the functor.
This commit is contained in:
Stephen Williams
parent
79a5dde7c4
commit
ba00c6caf7
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@ -202,22 +202,22 @@ vvp_net_fil_t::~vvp_net_fil_t()
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{
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}
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bool vvp_net_fil_t::filter_vec4(const vvp_vector4_t&)
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const vvp_vector4_t* vvp_net_fil_t::filter_vec4(const vvp_vector4_t&val)
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{
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return &val;
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}
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const vvp_vector8_t* vvp_net_fil_t::filter_vec8(const vvp_vector8_t&val)
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{
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return &val;
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}
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bool vvp_net_fil_t::filter_real(double&)
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{
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return true;
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}
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bool vvp_net_fil_t::filter_vec8(const vvp_vector8_t&)
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{
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return true;
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}
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bool vvp_net_fil_t::filter_real(double)
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{
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return true;
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}
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bool vvp_net_fil_t::filter_long(long)
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bool vvp_net_fil_t::filter_long(long&)
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{
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return true;
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}
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@ -387,6 +387,8 @@ void vvp_send_long_pv(vvp_net_ptr_t ptr, long val,
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}
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}
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const vvp_vector4_t vvp_vector4_t::nil;
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void vvp_vector4_t::copy_bits(const vvp_vector4_t&that)
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{
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@ -2369,6 +2371,8 @@ vvp_vector8_t::vvp_vector8_t(const vvp_vector4_t&that,
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}
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const vvp_vector8_t vvp_vector8_t::nil;
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vvp_vector8_t& vvp_vector8_t::operator= (const vvp_vector8_t&that)
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{
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// Assign to self.
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@ -196,6 +196,9 @@ class vvp_vector4_t {
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friend class vvp_vector4array_sa;
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friend class vvp_vector4array_aa;
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public:
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static const vvp_vector4_t nil;
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public:
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explicit vvp_vector4_t(unsigned size =0, vvp_bit4_t bits =BIT4_X);
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@ -778,6 +781,10 @@ class vvp_vector8_t {
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~vvp_vector8_t();
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static const vvp_vector8_t nil;
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public:
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unsigned size() const { return size_; }
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vvp_scalar_t value(unsigned idx) const;
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vvp_vector8_t subvalue(unsigned adr, unsigned width) const;
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@ -1088,10 +1095,16 @@ class vvp_net_fil_t {
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virtual ~vvp_net_fil_t();
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public:
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virtual bool filter_vec4(const vvp_vector4_t&bit);
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virtual bool filter_vec8(const vvp_vector8_t&val);
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virtual bool filter_real(double val);
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virtual bool filter_long(long val);
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// Return a non-empty vector if the filter allows an
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// output. The output result may be different from the
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// input. If the output is nil, then suppress propagation.
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virtual const vvp_vector4_t* filter_vec4(const vvp_vector4_t&bit);
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virtual const vvp_vector8_t* filter_vec8(const vvp_vector8_t&val);
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// Return true if the value is to be propagated, or false if
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// propagation is suppressed. The value may be edited by the filter.
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virtual bool filter_real(double&val);
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virtual bool filter_long(long&val);
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};
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/* **** Some core net functions **** */
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@ -1335,10 +1348,11 @@ inline void vvp_net_t::send_vec8_pv(const vvp_vector8_t&val,
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inline void vvp_net_t::send_vec4(const vvp_vector4_t&val, vvp_context_t context)
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{
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if (fil && ! fil->filter_vec4(val))
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const vvp_vector4_t*val_out = fil? fil->filter_vec4(val) : &val;
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if (val_out == 0)
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return;
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vvp_send_vec4(out_, val, context);
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vvp_send_vec4(out_, *val_out, context);
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}
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inline void vvp_net_t::send_vec4_pv(const vvp_vector4_t&val,
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@ -1350,10 +1364,11 @@ inline void vvp_net_t::send_vec4_pv(const vvp_vector4_t&val,
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inline void vvp_net_t::send_vec8(const vvp_vector8_t&val)
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{
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if (fil && ! fil->filter_vec8(val))
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const vvp_vector8_t*val_out = fil? fil->filter_vec8(val) : &val;
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if (val_out == 0)
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return;
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vvp_send_vec8(out_, val);
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vvp_send_vec8(out_, *val_out);
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}
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inline void vvp_net_t::send_real(double val, vvp_context_t context)
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@ -43,58 +43,205 @@ template <class T> T coerce_to_width(const T&that, unsigned width)
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vvp_filter_wire_base::vvp_filter_wire_base()
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{
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continuous_assign_active_ = false;
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}
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vvp_filter_wire_base::~vvp_filter_wire_base()
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{
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}
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bool vvp_filter_wire_base::filter_vec4(const vvp_vector4_t&)
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const vvp_vector4_t* vvp_filter_wire_base::filter_vec4(const vvp_vector4_t&val)
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{
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if (force_mask_.size()) {
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bool propagate_flag = false;
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assert(val.size() == force_mask_.size());
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assert(val.size() == force4_.size());
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filter4_ = val;
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for (unsigned idx = 0 ; idx < val.size() ; idx += 1) {
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if (force_mask_.value(idx))
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filter4_.set_bit(idx, force4_.value(idx));
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else
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propagate_flag = true;
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}
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if (propagate_flag) {
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run_vpi_callbacks();
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return &filter4_;
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} else {
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return 0;
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}
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} else {
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run_vpi_callbacks();
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return &val;
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}
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}
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const vvp_vector8_t* vvp_filter_wire_base::filter_vec8(const vvp_vector8_t&val)
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{
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if (force_mask_.size()) {
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bool propagate_flag = false;
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assert(val.size() == force_mask_.size());
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assert(val.size() == force8_.size());
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filter8_ = val;
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for (unsigned idx = 0 ; idx < val.size() ; idx += 1) {
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if (force_mask_.value(idx))
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filter8_.set_bit(idx, force8_.value(idx));
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else
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propagate_flag = true;
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}
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if (propagate_flag) {
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run_vpi_callbacks();
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return&filter8_;
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} else {
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return 0;
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}
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} else {
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run_vpi_callbacks();
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return &val;
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}
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}
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bool vvp_filter_wire_base::filter_real(double&val)
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{
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run_vpi_callbacks();
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return true;
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}
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bool vvp_filter_wire_base::filter_vec8(const vvp_vector8_t&)
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bool vvp_filter_wire_base::filter_long(long&)
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{
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run_vpi_callbacks();
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return true;
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}
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bool vvp_filter_wire_base::filter_real(double)
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void vvp_filter_wire_base::force_vec4(const vvp_vector4_t&val, vvp_vector2_t mask)
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{
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run_vpi_callbacks();
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return true;
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if (force_mask_.size() == 0)
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force_mask_ = vvp_vector2_t(vvp_vector2_t::FILL0, mask.size());
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if (force4_.size() == 0)
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force4_ = val;
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assert(force_mask_.size() == mask.size());
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for (unsigned idx = 0; idx < mask.size() ; idx += 1) {
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if (mask.value(idx) == 0)
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continue;
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force_mask_.set_bit(idx, 1);
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force4_.set_bit(idx, val.value(idx));
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}
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}
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bool vvp_filter_wire_base::filter_long(long)
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void vvp_filter_wire_base::force_vec8(const vvp_vector8_t&val, vvp_vector2_t mask)
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{
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run_vpi_callbacks();
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return true;
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if (force_mask_.size() == 0)
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force_mask_ = vvp_vector2_t(vvp_vector2_t::FILL0, mask.size());
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if (force8_.size() == 0)
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force8_ = val;
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assert(force_mask_.size() == mask.size());
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for (unsigned idx = 0; idx < mask.size() ; idx += 1) {
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if (mask.value(idx) == 0)
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continue;
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force_mask_.set_bit(idx, 1);
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force8_.set_bit(idx, val.value(idx));
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}
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}
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void vvp_filter_wire_base::deassign()
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void vvp_filter_wire_base::force_real(double val, vvp_vector2_t mask)
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{
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continuous_assign_active_ = false;
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assign_mask_ = vvp_vector2_t();
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}
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if (force_mask_.size() == 0)
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force_mask_ = vvp_vector2_t(vvp_vector2_t::FILL0, mask.size());
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void vvp_filter_wire_base::deassign_pv(unsigned base, unsigned wid)
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{
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for (unsigned idx = 0 ; idx < wid ; idx += 1) {
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assign_mask_.set_bit(base+idx, 0);
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assert(force_mask_.size() == mask.size());
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for (unsigned idx = 0 ; idx < mask.size() ; idx += 1) {
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if (mask.value(idx) == 0)
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continue;
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force_mask_.set_bit(idx, 1);
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}
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if (assign_mask_.is_zero()) {
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assign_mask_ = vvp_vector2_t();
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force_real_ = val;
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}
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vvp_bit4_t vvp_filter_wire_base::filtered_value(const vvp_vector4_t&val, unsigned idx) const
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{
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if (force_mask_.size() == 0)
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return val.value(idx);
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if (force_mask_.value(idx))
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return force4_.value(idx);
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return val.value(idx);
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}
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vvp_scalar_t vvp_filter_wire_base::filtered_value(const vvp_vector8_t&val, unsigned idx) const
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{
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if (force_mask_.size() == 0)
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return val.value(idx);
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if (force_mask_.value(idx))
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return force8_.value(idx);
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return val.value(idx);
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}
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const vvp_vector4_t& vvp_filter_wire_base::filtered_vec4(const vvp_vector4_t&val) const
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{
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if (force_mask_.size() == 0)
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return val;
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filter4_ = val;
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for (unsigned idx = 0 ; idx < val.size() ; idx += 1) {
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if (force_mask_.value(idx))
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filter4_.set_bit(idx, force4_.value(idx));
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}
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return filter4_;
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}
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const vvp_vector8_t& vvp_filter_wire_base::filtered_vec8(const vvp_vector8_t&val) const
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{
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if (force_mask_.size() == 0)
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return val;
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filter8_ = val;
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for (unsigned idx = 0 ; idx < val.size() ; idx += 1) {
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if (force_mask_.value(idx))
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filter8_.set_bit(idx, force8_.value(idx));
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}
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return filter8_;
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}
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double vvp_filter_wire_base::filtered_real(double val) const
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{
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if (force_mask_.size() == 0)
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return val;
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if (force_mask_.value(0) == 0)
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return val;
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return force_real_;
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}
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void vvp_filter_wire_base::release_mask(vvp_vector2_t mask)
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{
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if (force_mask_.size() == 0)
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return;
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assert(force_mask_.size() == mask.size());
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for (unsigned idx = 0 ; idx < mask.size() ; idx += 1) {
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if (mask.value(idx))
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force_mask_.set_bit(idx, 0);
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}
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if (force_mask_.is_zero())
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force_mask_ = vvp_vector2_t();
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}
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/* **** vvp_fun_signal methods **** */
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vvp_fun_signal_base::vvp_fun_signal_base()
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{
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continuous_assign_active_ = false;
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needs_init_ = true;
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force_link = 0;
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cassign_link = 0;
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@ -216,17 +363,17 @@ void vvp_fun_signal4_sa::recv_vec4(vvp_net_ptr_t ptr, const vvp_vector4_t&bit,
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break;
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case 2: // Force value
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{ vvp_vector4_t tmp (bit);
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// Force from a node may not have been sized completely
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// by the source, so coerce the size here.
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if (bit.size() != size())
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force_ = coerce_to_width(bit, size());
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else
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force_ = bit;
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// Force from a node may not have been sized completely
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// by the source, so coerce the size here.
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if (tmp.size() != size())
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tmp = coerce_to_width(tmp, size());
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force_mask_ = vvp_vector2_t(vvp_vector2_t::FILL1, size());
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calculate_output_(ptr);
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break;
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ptr.ptr()->send_vec4(tmp, 0);
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force_vec4(tmp, vvp_vector2_t(vvp_vector2_t::FILL1,tmp.size()));
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}
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break;
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default:
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fprintf(stderr, "Unsupported port type %d.\n", ptr.port());
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@ -285,19 +432,16 @@ void vvp_fun_signal4_sa::recv_vec4_pv(vvp_net_ptr_t ptr, const vvp_vector4_t&bit
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break;
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case 2: // Force value
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if (force_mask_.size() == 0)
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force_mask_ = vvp_vector2_t(vvp_vector2_t::FILL0, size());
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if (force_.size() == 0)
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force_ = vvp_vector4_t(vwid, BIT4_Z);
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for (unsigned idx = 0 ; idx < wid ; idx += 1) {
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force_mask_.set_bit(base+idx, 1);
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force_.set_bit(base+idx, bit.value(idx));
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}
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calculate_output_(ptr);
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break;
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{ vvp_vector2_t mask (vvp_vector2_t::FILL0, vwid);
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vvp_vector4_t vec (vwid, BIT4_Z);
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for (unsigned idx = 0 ; idx < wid ; idx += 1) {
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mask.set_bit(base+idx, 1);
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vec.set_bit(base+idx, bit.value(idx));
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}
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force_vec4(vec, mask);
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calculate_output_(ptr);
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break;
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}
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default:
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fprintf(stderr, "Unsupported port type %d.\n", ptr.port());
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@ -314,27 +458,39 @@ void vvp_fun_signal4_sa::recv_vec8_pv(vvp_net_ptr_t ptr, const vvp_vector8_t&bit
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void vvp_fun_signal4_sa::calculate_output_(vvp_net_ptr_t ptr)
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{
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if (force_mask_.size()) {
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assert(bits4_.size() == force_mask_.size());
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assert(bits4_.size() == force_.size());
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vvp_vector4_t bits (bits4_);
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for (unsigned idx = 0 ; idx < bits.size() ; idx += 1) {
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if (force_mask_.value(idx))
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bits.set_bit(idx, force_.value(idx));
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}
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ptr.ptr()->send_vec4(bits, 0);
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} else {
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ptr.ptr()->send_vec4(bits4_, 0);
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}
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ptr.ptr()->send_vec4(bits4_, 0);
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}
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void vvp_fun_signal_base::deassign()
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{
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continuous_assign_active_ = false;
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assign_mask_ = vvp_vector2_t();
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}
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void vvp_fun_signal_base::deassign_pv(unsigned base, unsigned wid)
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{
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for (unsigned idx = 0 ; idx < wid ; idx += 1) {
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assign_mask_.set_bit(base+idx, 0);
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}
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if (assign_mask_.is_zero()) {
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assign_mask_ = vvp_vector2_t();
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}
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}
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void vvp_fun_signal4_sa::release(vvp_net_ptr_t ptr, bool net)
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{
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force_mask_ = vvp_vector2_t();
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vvp_vector2_t mask (vvp_vector2_t::FILL1, bits4_.size());
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if (net) {
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// If releasing a net, then the output should revert to
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// the un-forced value.
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release_mask(mask);
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ptr.ptr()->send_vec4(bits4_, 0);
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} else {
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bits4_ = force_;
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// Variables keep their forced value after the release.
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bits4_ = filtered_vec4(bits4_);
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release_mask(mask);
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}
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}
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|
|
@ -343,55 +499,38 @@ void vvp_fun_signal4_sa::release_pv(vvp_net_ptr_t ptr, bool net,
|
|||
{
|
||||
assert(bits4_.size() >= base + wid);
|
||||
|
||||
for (unsigned idx = 0 ; idx < wid ; idx += 1) {
|
||||
force_mask_.set_bit(base+idx, 0);
|
||||
if (!net) bits4_.set_bit(base+idx, force_.value(base+idx));
|
||||
}
|
||||
if (force_mask_.is_zero()) force_mask_ = vvp_vector2_t();
|
||||
vvp_vector2_t mask (vvp_vector2_t::FILL0, bits4_.size());
|
||||
for (unsigned idx = 0 ; idx < wid ; idx += 1)
|
||||
mask.set_bit(base+idx, 1);
|
||||
|
||||
if (net) {
|
||||
release_mask(mask);
|
||||
calculate_output_(ptr);
|
||||
} else {
|
||||
bits4_ = filtered_vec4(bits4_);
|
||||
release_mask(mask);
|
||||
}
|
||||
|
||||
if (net) calculate_output_(ptr);
|
||||
}
|
||||
|
||||
unsigned vvp_fun_signal4_sa::size() const
|
||||
{
|
||||
if (force_mask_.size())
|
||||
return force_.size();
|
||||
else
|
||||
return bits4_.size();
|
||||
return bits4_.size();
|
||||
}
|
||||
|
||||
vvp_bit4_t vvp_fun_signal4_sa::value(unsigned idx) const
|
||||
{
|
||||
if (force_mask_.size() && force_mask_.value(idx)) {
|
||||
return force_.value(idx);
|
||||
} else {
|
||||
return bits4_.value(idx);
|
||||
}
|
||||
return filtered_value(bits4_, idx);
|
||||
}
|
||||
|
||||
vvp_scalar_t vvp_fun_signal4_sa::scalar_value(unsigned idx) const
|
||||
{
|
||||
if (force_mask_.size() && force_mask_.value(idx)) {
|
||||
return vvp_scalar_t(force_.value(idx), 6, 6);
|
||||
} else {
|
||||
return vvp_scalar_t(bits4_.value(idx), 6, 6);
|
||||
}
|
||||
return vvp_scalar_t(value(idx), 6, 6);
|
||||
}
|
||||
|
||||
vvp_vector4_t vvp_fun_signal4_sa::vec4_value() const
|
||||
{
|
||||
if (force_mask_.size()) {
|
||||
assert(bits4_.size() == force_mask_.size());
|
||||
assert(bits4_.size() == force_.size());
|
||||
vvp_vector4_t bits (bits4_);
|
||||
for (unsigned idx = 0 ; idx < bits.size() ; idx += 1) {
|
||||
if (force_mask_.value(idx))
|
||||
bits.set_bit(idx, force_.value(idx));
|
||||
}
|
||||
return bits;
|
||||
} else {
|
||||
return bits4_;
|
||||
}
|
||||
return filtered_vec4(bits4_);
|
||||
}
|
||||
|
||||
vvp_fun_signal4_aa::vvp_fun_signal4_aa(unsigned wid, vvp_bit4_t init)
|
||||
|
|
@ -532,17 +671,22 @@ void vvp_fun_signal8::recv_vec8(vvp_net_ptr_t ptr, const vvp_vector8_t&bit)
|
|||
break;
|
||||
|
||||
case 2: // Force value
|
||||
{ vvp_vector8_t tmp(bit);
|
||||
|
||||
// Force from a node may not have been sized completely
|
||||
// by the source, so coerce the size here.
|
||||
if (bit.size() != size())
|
||||
force_ = coerce_to_width(bit, size());
|
||||
else
|
||||
force_ = bit;
|
||||
// Force from a node may not have been sized completely
|
||||
// by the source, so coerce the size here.
|
||||
if (tmp.size() != size())
|
||||
tmp = coerce_to_width(tmp, size());
|
||||
|
||||
force_mask_ = vvp_vector2_t(vvp_vector2_t::FILL1, size());
|
||||
calculate_output_(ptr);
|
||||
break;
|
||||
// Propagate the forced value before setting the
|
||||
// force mask. This is so that the forced value gets
|
||||
// out to the network before the force filter is set
|
||||
// up. If the force filter is set up first, then the
|
||||
// filter will block the exact match.
|
||||
ptr.ptr()->send_vec8(tmp);
|
||||
force_vec8(tmp, vvp_vector2_t(vvp_vector2_t::FILL1,tmp.size()));
|
||||
}
|
||||
break;
|
||||
|
||||
default:
|
||||
fprintf(stderr, "Unsupported port type %d.\n", ptr.port());
|
||||
|
|
@ -582,19 +726,16 @@ void vvp_fun_signal8::recv_vec8_pv(vvp_net_ptr_t ptr, const vvp_vector8_t&bit,
|
|||
break;
|
||||
|
||||
case 2: // Force value
|
||||
|
||||
if (force_mask_.size() == 0)
|
||||
force_mask_ = vvp_vector2_t(vvp_vector2_t::FILL0, size());
|
||||
if (force_.size() == 0)
|
||||
force_ = vvp_vector8_t(vvp_vector4_t(vwid, BIT4_Z),6,6);
|
||||
|
||||
for (unsigned idx = 0 ; idx < wid ; idx += 1) {
|
||||
force_mask_.set_bit(base+idx, 1);
|
||||
force_.set_bit(base+idx, bit.value(idx));
|
||||
}
|
||||
|
||||
calculate_output_(ptr);
|
||||
break;
|
||||
{ vvp_vector2_t mask (vvp_vector2_t::FILL0, vwid);
|
||||
vvp_vector8_t vec (vvp_vector4_t(vwid, BIT4_Z),6,6);
|
||||
for (unsigned idx = 0 ; idx < wid ; idx += 1) {
|
||||
mask.set_bit(base+idx, 1);
|
||||
vec.set_bit(base+idx, bit.value(idx));
|
||||
}
|
||||
force_vec8(vec, mask);
|
||||
calculate_output_(ptr);
|
||||
break;
|
||||
}
|
||||
|
||||
default:
|
||||
fprintf(stderr, "Unsupported port type %d.\n", ptr.port());
|
||||
|
|
@ -605,28 +746,22 @@ void vvp_fun_signal8::recv_vec8_pv(vvp_net_ptr_t ptr, const vvp_vector8_t&bit,
|
|||
|
||||
void vvp_fun_signal8::calculate_output_(vvp_net_ptr_t ptr)
|
||||
{
|
||||
if (force_mask_.size()) {
|
||||
assert(bits8_.size() == force_mask_.size());
|
||||
assert(bits8_.size() == force_.size());
|
||||
vvp_vector8_t bits (bits8_);
|
||||
for (unsigned idx = 0 ; idx < bits.size() ; idx += 1) {
|
||||
if (force_mask_.value(idx))
|
||||
bits.set_bit(idx, force_.value(idx));
|
||||
}
|
||||
ptr.ptr()->send_vec8(bits);
|
||||
|
||||
} else {
|
||||
ptr.ptr()->send_vec8(bits8_);
|
||||
}
|
||||
ptr.ptr()->send_vec8(bits8_);
|
||||
}
|
||||
|
||||
void vvp_fun_signal8::release(vvp_net_ptr_t ptr, bool net)
|
||||
{
|
||||
force_mask_ = vvp_vector2_t();
|
||||
vvp_vector2_t mask (vvp_vector2_t::FILL1, bits8_.size());
|
||||
|
||||
if (net) {
|
||||
// If releasing a net, then the output should revert to
|
||||
// the un-forced value.
|
||||
release_mask(mask);
|
||||
ptr.ptr()->send_vec8(bits8_);
|
||||
} else {
|
||||
bits8_ = force_;
|
||||
// Variables keep their forced value after the release.
|
||||
bits8_ = filtered_vec8(bits8_);
|
||||
release_mask(mask);
|
||||
}
|
||||
}
|
||||
|
||||
|
|
@ -635,50 +770,37 @@ void vvp_fun_signal8::release_pv(vvp_net_ptr_t ptr, bool net,
|
|||
{
|
||||
assert(bits8_.size() >= base + wid);
|
||||
|
||||
for (unsigned idx = 0 ; idx < wid ; idx += 1) {
|
||||
force_mask_.set_bit(base+idx, 0);
|
||||
if (!net) bits8_.set_bit(base+idx, force_.value(base+idx));
|
||||
}
|
||||
if (force_mask_.is_zero()) force_mask_ = vvp_vector2_t();
|
||||
vvp_vector2_t mask (vvp_vector2_t::FILL0, bits8_.size());
|
||||
for (unsigned idx = 0 ; idx < wid ; idx += 1)
|
||||
mask.set_bit(base+idx, 1);
|
||||
|
||||
if (net) calculate_output_(ptr);
|
||||
if (net) {
|
||||
release_mask(mask);
|
||||
calculate_output_(ptr);
|
||||
} else {
|
||||
bits8_ = filtered_vec8(bits8_);
|
||||
release_mask(mask);
|
||||
}
|
||||
}
|
||||
|
||||
unsigned vvp_fun_signal8::size() const
|
||||
{
|
||||
if (force_mask_.size())
|
||||
return force_.size();
|
||||
else
|
||||
return bits8_.size();
|
||||
return bits8_.size();
|
||||
}
|
||||
|
||||
vvp_bit4_t vvp_fun_signal8::value(unsigned idx) const
|
||||
{
|
||||
if (force_mask_.size() && force_mask_.value(idx))
|
||||
return force_.value(idx).value();
|
||||
else
|
||||
return bits8_.value(idx).value();
|
||||
return filtered_value(bits8_, idx).value();
|
||||
}
|
||||
|
||||
vvp_vector4_t vvp_fun_signal8::vec4_value() const
|
||||
{
|
||||
if (force_mask_.size()) {
|
||||
vvp_vector8_t bits (bits8_);
|
||||
for (unsigned idx = 0 ; idx < bits.size() ; idx += 1) {
|
||||
if (force_mask_.value(idx))
|
||||
bits.set_bit(idx, force_.value(idx));
|
||||
}
|
||||
return reduce4(bits);
|
||||
} else
|
||||
return reduce4(bits8_);
|
||||
return reduce4(filtered_vec8(bits8_));
|
||||
}
|
||||
|
||||
vvp_scalar_t vvp_fun_signal8::scalar_value(unsigned idx) const
|
||||
{
|
||||
if (force_mask_.size() && force_mask_.value(idx))
|
||||
return force_.value(idx);
|
||||
else
|
||||
return bits8_.value(idx);
|
||||
return filtered_value(bits8_, idx);
|
||||
}
|
||||
|
||||
|
||||
|
|
@ -699,10 +821,7 @@ vvp_fun_signal_real_sa::vvp_fun_signal_real_sa()
|
|||
|
||||
double vvp_fun_signal_real_sa::real_value() const
|
||||
{
|
||||
if (force_mask_.size())
|
||||
return force_;
|
||||
else
|
||||
return bits_;
|
||||
return filtered_real(bits_);
|
||||
}
|
||||
|
||||
void vvp_fun_signal_real_sa::recv_real(vvp_net_ptr_t ptr, double bit,
|
||||
|
|
@ -726,8 +845,7 @@ void vvp_fun_signal_real_sa::recv_real(vvp_net_ptr_t ptr, double bit,
|
|||
break;
|
||||
|
||||
case 2: // Force value
|
||||
force_mask_ = vvp_vector2_t(1, 1);
|
||||
force_ = bit;
|
||||
force_real(bit, vvp_vector2_t(vvp_vector2_t::FILL1, 1));
|
||||
ptr.ptr()->send_real(bit, 0);
|
||||
break;
|
||||
|
||||
|
|
@ -740,11 +858,14 @@ void vvp_fun_signal_real_sa::recv_real(vvp_net_ptr_t ptr, double bit,
|
|||
|
||||
void vvp_fun_signal_real_sa::release(vvp_net_ptr_t ptr, bool net)
|
||||
{
|
||||
force_mask_ = vvp_vector2_t();
|
||||
vvp_vector2_t mask (vvp_vector2_t::FILL1, 1);
|
||||
|
||||
if (net) {
|
||||
release_mask(mask);
|
||||
ptr.ptr()->send_real(bits_, 0);
|
||||
} else {
|
||||
bits_ = force_;
|
||||
bits_ = filtered_real(bits_);
|
||||
release_mask(mask);
|
||||
}
|
||||
}
|
||||
|
||||
|
|
|
|||
|
|
@ -134,23 +134,51 @@ class vvp_filter_wire_base : public vvp_net_fil_t, public vvp_vpi_callback {
|
|||
vvp_filter_wire_base();
|
||||
~vvp_filter_wire_base();
|
||||
|
||||
bool filter_vec4(const vvp_vector4_t&val);
|
||||
bool filter_vec8(const vvp_vector8_t&val);
|
||||
bool filter_real(double val);
|
||||
bool filter_long(long val);
|
||||
// These are the virtual methods that we implement to perform
|
||||
// the wire-style filtering.
|
||||
const vvp_vector4_t* filter_vec4(const vvp_vector4_t&val);
|
||||
const vvp_vector8_t* filter_vec8(const vvp_vector8_t&val);
|
||||
bool filter_real(double&val);
|
||||
bool filter_long(long&val);
|
||||
|
||||
public:
|
||||
void deassign();
|
||||
void deassign_pv(unsigned base, unsigned wid);
|
||||
// Force/release work in the filter by setting the forced
|
||||
// value using one of the force_* methods. This sets the
|
||||
// forced value as a mask of the bits of the vector that are
|
||||
// forced. The filter then automatically runs the filter on
|
||||
// the outputs that pass through. You can also get at the
|
||||
// filtering results using the filtered_* methods. The
|
||||
// release_mask() method releases bits of the vector.
|
||||
|
||||
// Enable filter force.
|
||||
void force_vec4(const vvp_vector4_t&val, vvp_vector2_t mask);
|
||||
void force_vec8(const vvp_vector8_t&val, vvp_vector2_t mask);
|
||||
void force_real(double val, vvp_vector2_t mask);
|
||||
|
||||
// Test the value against the filter.
|
||||
vvp_bit4_t filtered_value(const vvp_vector4_t&val, unsigned idx) const;
|
||||
vvp_scalar_t filtered_value(const vvp_vector8_t&val, unsigned idx) const;
|
||||
|
||||
const vvp_vector4_t& filtered_vec4(const vvp_vector4_t&val) const;
|
||||
const vvp_vector8_t& filtered_vec8(const vvp_vector8_t&val) const;
|
||||
double filtered_real(double val) const;
|
||||
|
||||
// Release the force on the bits set in the mask.
|
||||
void release_mask(vvp_vector2_t mask);
|
||||
|
||||
virtual void release(vvp_net_ptr_t ptr, bool net) =0;
|
||||
virtual void release_pv(vvp_net_ptr_t ptr, bool net,
|
||||
unsigned base, unsigned wid) =0;
|
||||
|
||||
protected:
|
||||
bool continuous_assign_active_;
|
||||
private:
|
||||
// Forced value
|
||||
vvp_vector2_t force_mask_;
|
||||
vvp_vector2_t assign_mask_;
|
||||
|
||||
vvp_vector4_t force4_;
|
||||
vvp_vector8_t force8_;
|
||||
double force_real_;
|
||||
// This is used as a static return value.
|
||||
mutable vvp_vector4_t filter4_;
|
||||
mutable vvp_vector8_t filter8_;
|
||||
};
|
||||
|
||||
class vvp_fun_signal_base : public vvp_net_fun_t, public vvp_filter_wire_base {
|
||||
|
|
@ -161,6 +189,9 @@ class vvp_fun_signal_base : public vvp_net_fun_t, public vvp_filter_wire_base {
|
|||
void recv_long_pv(vvp_net_ptr_t port, long bit,
|
||||
unsigned base, unsigned wid);
|
||||
|
||||
void deassign();
|
||||
void deassign_pv(unsigned base, unsigned wid);
|
||||
|
||||
public:
|
||||
|
||||
/* The %force/link instruction needs a place to write the
|
||||
|
|
@ -169,6 +200,10 @@ class vvp_fun_signal_base : public vvp_net_fun_t, public vvp_filter_wire_base {
|
|||
struct vvp_net_t*force_link;
|
||||
struct vvp_net_t*cassign_link;
|
||||
|
||||
protected:
|
||||
bool continuous_assign_active_;
|
||||
vvp_vector2_t assign_mask_;
|
||||
|
||||
protected:
|
||||
|
||||
// This is true until at least one propagation happens.
|
||||
|
|
@ -232,7 +267,6 @@ class vvp_fun_signal4_sa : public vvp_fun_signal4 {
|
|||
void calculate_output_(vvp_net_ptr_t ptr);
|
||||
|
||||
vvp_vector4_t bits4_;
|
||||
vvp_vector4_t force_;
|
||||
};
|
||||
|
||||
/*
|
||||
|
|
|
|||
Loading…
Reference in New Issue