Propogate constant 0 in low bits of adders.
This commit is contained in:
steve
parent
4558a7d8d0
commit
b6d1bb1fa7
153
cprop.cc
153
cprop.cc
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@ -17,7 +17,7 @@
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* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
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*/
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#if !defined(WINNT)
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#ident "$Id: cprop.cc,v 1.4 1999/12/17 06:18:15 steve Exp $"
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#ident "$Id: cprop.cc,v 1.5 1999/12/30 04:19:12 steve Exp $"
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#endif
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# include "netlist.h"
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@ -72,9 +72,147 @@ static verinum::V driven_value(const NetObj::Link&lnk)
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struct cprop_functor : public functor_t {
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unsigned count;
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virtual void lpm_add_sub(Design*des, NetAddSub*obj);
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virtual void lpm_ff(Design*des, NetFF*obj);
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virtual void lpm_logic(Design*des, NetLogic*obj);
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};
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void cprop_functor::lpm_add_sub(Design*des, NetAddSub*obj)
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{
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// For now, only additions are handled.
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if (obj->attribute("LPM_Direction") != "ADD")
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return;
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// If the low bit on the A side is 0, then eliminate it from
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// the adder, and pass the B side directly to the
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// result. Don't reduce the adder smaller then a 1-bit
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// adder. These will be eliminated later.
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while ((obj->width() > 1)
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&& all_drivers_constant(obj->pin_DataA(0))
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&& (driven_value(obj->pin_DataA(0)) == verinum::V0)) {
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NetAddSub*tmp = 0;
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tmp = new NetAddSub(obj->name(), obj->width()-1);
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//connect(tmp->pin_Aclr(), obj->pin_Aclr());
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//connect(tmp->pin_Add_Sub(), obj->pin_Add_Sub());
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//connect(tmp->pin_Clock(), obj->pin_Clock());
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//connect(tmp->pin_Cin(), obj->pin_Cin());
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connect(tmp->pin_Cout(), obj->pin_Cout());
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//connect(tmp->pin_Overflow(), obj->pin_Overflow());
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for (unsigned idx = 0 ; idx < tmp->width() ; idx += 1) {
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connect(tmp->pin_DataA(idx), obj->pin_DataA(idx+1));
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connect(tmp->pin_DataB(idx), obj->pin_DataB(idx+1));
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connect(tmp->pin_Result(idx), obj->pin_Result(idx+1));
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}
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connect(obj->pin_Result(0), obj->pin_DataB(0));
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delete obj;
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des->add_node(tmp);
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obj = tmp;
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count += 1;
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}
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// Now do the same thing on the B side.
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while ((obj->width() > 1)
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&& all_drivers_constant(obj->pin_DataB(0))
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&& (driven_value(obj->pin_DataB(0)) == verinum::V0)) {
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NetAddSub*tmp = 0;
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tmp = new NetAddSub(obj->name(), obj->width()-1);
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//connect(tmp->pin_Aclr(), obj->pin_Aclr());
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//connect(tmp->pin_Add_Sub(), obj->pin_Add_Sub());
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//connect(tmp->pin_Clock(), obj->pin_Clock());
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//connect(tmp->pin_Cin(), obj->pin_Cin());
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connect(tmp->pin_Cout(), obj->pin_Cout());
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//connect(tmp->pin_Overflow(), obj->pin_Overflow());
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for (unsigned idx = 0 ; idx < tmp->width() ; idx += 1) {
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connect(tmp->pin_DataA(idx), obj->pin_DataA(idx+1));
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connect(tmp->pin_DataB(idx), obj->pin_DataB(idx+1));
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connect(tmp->pin_Result(idx), obj->pin_Result(idx+1));
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}
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connect(obj->pin_Result(0), obj->pin_DataA(0));
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delete obj;
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des->add_node(tmp);
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obj = tmp;
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count += 1;
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}
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// If the adder is only 1 bit wide, then replace it with the
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// simple logic gate.
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if (obj->width() == 1) {
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NetLogic*tmp;
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if (obj->pin_Cout().is_linked()) {
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tmp = new NetLogic(des->local_symbol(obj->name()), 3,
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NetLogic::AND);
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connect(tmp->pin(0), obj->pin_Cout());
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connect(tmp->pin(1), obj->pin_DataA(0));
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connect(tmp->pin(2), obj->pin_DataB(0));
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des->add_node(tmp);
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}
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tmp = new NetLogic(obj->name(), 3, NetLogic::XOR);
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connect(tmp->pin(0), obj->pin_Result(0));
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connect(tmp->pin(1), obj->pin_DataA(0));
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connect(tmp->pin(2), obj->pin_DataB(0));
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delete obj;
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des->add_node(tmp);
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count += 1;
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return;
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}
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}
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void cprop_functor::lpm_ff(Design*des, NetFF*obj)
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{
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// Look for and count unlinked FF outputs. Note that if the
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// Data and Q pins are connected together, they can be removed
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// from the circuit.
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unsigned unlinked_count = 0;
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for (unsigned idx = 0 ; idx < obj->width() ; idx += 1) {
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if (connected(obj->pin_Data(idx), obj->pin_Q(idx))) {
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obj->pin_Data(idx).unlink();
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obj->pin_Q(idx).unlink();
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}
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if (! obj->pin_Q(idx).is_linked())
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unlinked_count += 1;
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}
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// If the entire FF is unlinked, remove the whole thing.
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if (unlinked_count == obj->width()) {
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delete obj;
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count += 1;
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return;
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}
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// If some of the FFs are unconnected, make a new FF array
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// that does not include the useless FF devices.
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if (unlinked_count > 0) {
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NetFF*tmp = new NetFF(obj->name(), obj->width()-unlinked_count);
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connect(tmp->pin_Clock(), obj->pin_Clock());
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connect(tmp->pin_Enable(), obj->pin_Enable());
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connect(tmp->pin_Aload(), obj->pin_Aload());
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connect(tmp->pin_Aset(), obj->pin_Aset());
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connect(tmp->pin_Aclr(), obj->pin_Aclr());
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connect(tmp->pin_Sload(), obj->pin_Sload());
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connect(tmp->pin_Sset(), obj->pin_Sset());
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connect(tmp->pin_Sclr(), obj->pin_Sclr());
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unsigned tidx = 0;
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for (unsigned idx = 0 ; idx < obj->width() ; idx += 1)
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if (obj->pin_Q(idx).is_linked()) {
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connect(tmp->pin_Data(tidx), obj->pin_Data(idx));
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connect(tmp->pin_Q(tidx), obj->pin_Q(idx));
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tidx += 1;
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}
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assert(tidx == obj->width() - unlinked_count);
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delete obj;
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des->add_node(tmp);
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count += 1;
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return;
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}
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}
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void cprop_functor::lpm_logic(Design*des, NetLogic*obj)
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{
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switch (obj->type()) {
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@ -89,6 +227,7 @@ void cprop_functor::lpm_logic(Design*des, NetLogic*obj)
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if (driven_value(obj->pin(idx)) == verinum::V0) {
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connect(obj->pin(0), obj->pin(idx));
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delete obj;
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count += 1;
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return;
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}
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}
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@ -106,6 +245,7 @@ void cprop_functor::lpm_logic(Design*des, NetLogic*obj)
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if (driven_value(obj->pin(idx)) != verinum::V1) {
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connect(obj->pin(0), obj->pin(idx));
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delete obj;
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count += 1;
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return;
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}
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}
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@ -114,6 +254,7 @@ void cprop_functor::lpm_logic(Design*des, NetLogic*obj)
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// input as the output value and remove the gate.
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connect(obj->pin(0), obj->pin(1));
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delete obj;
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count += 1;
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return;
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default:
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@ -163,8 +304,13 @@ void cprop_dc_functor::lpm_const(Design*des, NetConst*obj)
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void cprop(Design*des)
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{
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// Continually propogate constants until a scan finds nothing
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// to do.
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cprop_functor prop;
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des->functor(&prop);
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do {
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prop.count = 0;
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des->functor(&prop);
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} while (prop.count > 0);
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cprop_dc_functor dc;
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des->functor(&dc);
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@ -172,6 +318,9 @@ void cprop(Design*des)
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/*
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* $Log: cprop.cc,v $
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* Revision 1.5 1999/12/30 04:19:12 steve
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* Propogate constant 0 in low bits of adders.
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*
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* Revision 1.4 1999/12/17 06:18:15 steve
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* Rewrite the cprop functor to use the functor_t interface.
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*
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14
functor.cc
14
functor.cc
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@ -17,7 +17,7 @@
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* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
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*/
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#if !defined(WINNT)
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#ident "$Id: functor.cc,v 1.7 1999/12/17 06:18:16 steve Exp $"
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#ident "$Id: functor.cc,v 1.8 1999/12/30 04:19:12 steve Exp $"
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#endif
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# include "functor.h"
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@ -35,6 +35,10 @@ void functor_t::process(class Design*, class NetProcTop*)
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{
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}
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void functor_t::lpm_add_sub(class Design*, class NetAddSub*)
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{
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}
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void functor_t::lpm_const(class Design*, class NetConst*)
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{
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}
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@ -83,6 +87,11 @@ void NetNode::functor_node(Design*, functor_t*)
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{
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}
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void NetAddSub::functor_node(Design*des, functor_t*fun)
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{
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fun->lpm_add_sub(des, this);
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}
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void NetConst::functor_node(Design*des, functor_t*fun)
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{
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fun->lpm_const(des, this);
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@ -149,6 +158,9 @@ int NetPEvent::match_proc(proc_match_t*that)
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/*
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* $Log: functor.cc,v $
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* Revision 1.8 1999/12/30 04:19:12 steve
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* Propogate constant 0 in low bits of adders.
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*
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* Revision 1.7 1999/12/17 06:18:16 steve
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* Rewrite the cprop functor to use the functor_t interface.
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*
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@ -19,7 +19,7 @@
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* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
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*/
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#if !defined(WINNT)
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#ident "$Id: functor.h,v 1.5 1999/12/17 06:18:16 steve Exp $"
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#ident "$Id: functor.h,v 1.6 1999/12/30 04:19:12 steve Exp $"
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#endif
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/*
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@ -42,6 +42,9 @@ struct functor_t {
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/* This method is called for each process in the design. */
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virtual void process(class Design*des, class NetProcTop*);
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/* This method is called for each structural adder. */
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virtual void lpm_add_sub(class Design*des, class NetAddSub*);
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/* This method is called for each structural constant. */
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virtual void lpm_const(class Design*des, class NetConst*);
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@ -64,6 +67,9 @@ struct proc_match_t {
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/*
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* $Log: functor.h,v $
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* Revision 1.6 1999/12/30 04:19:12 steve
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* Propogate constant 0 in low bits of adders.
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*
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* Revision 1.5 1999/12/17 06:18:16 steve
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* Rewrite the cprop functor to use the functor_t interface.
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*
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@ -17,7 +17,7 @@
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* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
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*/
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#if !defined(WINNT)
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#ident "$Id: netlist.cc,v 1.101 1999/12/17 03:38:46 steve Exp $"
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#ident "$Id: netlist.cc,v 1.102 1999/12/30 04:19:12 steve Exp $"
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#endif
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# include <cassert>
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@ -145,7 +145,7 @@ bool NetObj::Link::is_linked(const NetObj&that) const
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bool NetObj::Link::is_linked(const NetObj::Link&that) const
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{
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for (const Link*idx = next_ ; this != idx ; idx = idx->next_)
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if (idx == &that)
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if (idx->is_equal(that))
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return true;
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return false;
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@ -2764,6 +2764,9 @@ NetNet* Design::find_signal(bool (*func)(const NetNet*))
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/*
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* $Log: netlist.cc,v $
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* Revision 1.102 1999/12/30 04:19:12 steve
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* Propogate constant 0 in low bits of adders.
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*
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* Revision 1.101 1999/12/17 03:38:46 steve
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* NetConst can now hold wide constants.
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*
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@ -19,7 +19,7 @@
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* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
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*/
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#if !defined(WINNT)
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#ident "$Id: netlist.h,v 1.104 1999/12/17 06:18:16 steve Exp $"
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#ident "$Id: netlist.h,v 1.105 1999/12/30 04:19:12 steve Exp $"
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#endif
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/*
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@ -328,6 +328,7 @@ class NetAddSub : public NetNode {
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virtual void dump_node(ostream&, unsigned ind) const;
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virtual void emit_node(ostream&, struct target_t*) const;
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virtual void functor_node(Design*des, functor_t*fun);
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};
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/*
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@ -2080,6 +2081,9 @@ extern ostream& operator << (ostream&, NetNet::Type);
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/*
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* $Log: netlist.h,v $
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* Revision 1.105 1999/12/30 04:19:12 steve
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* Propogate constant 0 in low bits of adders.
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*
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* Revision 1.104 1999/12/17 06:18:16 steve
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* Rewrite the cprop functor to use the functor_t interface.
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*
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