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Refactor and clean up cast.cc 

This splits up the monolithic and confusing vhdl_expr::cast function into
several smaller to_XXX functions which each generate code to cast an 
expression to type XXX. This makes it much easier to understand and maintain.
This commit is contained in:
Nick Gasson 2008-08-27 16:47:07 +01:00
parent 924ddb787a
commit b5e65ac9ed
2 changed files with 153 additions and 108 deletions
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173
tgt-vhdl/cast.cc
View File

@ -39,7 +39,73 @@ vhdl_expr *vhdl_expr::cast(const vhdl_type *to)
else else
return resize(to->get_width()); return resize(to->get_width());
} }
else if (to->get_name() == VHDL_TYPE_BOOLEAN) { else if (to->get_name() == VHDL_TYPE_BOOLEAN)
return to_boolean();
else if (to->get_name() == VHDL_TYPE_INTEGER)
return to_integer();
else if (to->get_name() == VHDL_TYPE_UNSIGNED
|| to->get_name() == VHDL_TYPE_SIGNED
|| to->get_name() == VHDL_TYPE_STD_LOGIC_VECTOR)
return to_vector(to->get_name(), to->get_width());
else if (to->get_name() == VHDL_TYPE_STD_LOGIC)
return to_std_logic();
else
assert(false);
}
/*
* Generate code to cast an expression to a vector type (std_logic_vector,
* signed, unsigned).
*/
vhdl_expr *vhdl_expr::to_vector(vhdl_type_name_t name, int w)
{
if (type_->get_name() == VHDL_TYPE_STD_LOGIC) {
vhdl_expr *others = w == 1 ? NULL : new vhdl_const_bit('0');
vhdl_bit_spec_expr *bs =
new vhdl_bit_spec_expr(new vhdl_type(name, w - 1, 0), others);
bs->add_bit(0, this);
return bs;
}
else {
// We have to cast the expression before resizing or the
// wrong sign bit may be extended (i.e. when casting between
// signed/unsigned *and* resizing)
vhdl_type *t = new vhdl_type(name, w - 1, 0);
vhdl_fcall *conv = new vhdl_fcall(t->get_string().c_str(), t);
conv->add_expr(this);
if (w != type_->get_width())
return conv->resize(w);
else
return conv;
}
}
/*
* Convert a generic expression to an Integer.
*/
vhdl_expr *vhdl_expr::to_integer()
{
vhdl_fcall *conv;
if (type_->get_name() == VHDL_TYPE_STD_LOGIC) {
require_support_function(SF_LOGIC_TO_INTEGER);
conv = new vhdl_fcall(support_function::function_name(SF_LOGIC_TO_INTEGER),
vhdl_type::integer());
}
else
conv = new vhdl_fcall("To_Integer", vhdl_type::integer());
conv->add_expr(this);
return conv;
}
/*
* Convert a generic expression to a Boolean.
*/
vhdl_expr *vhdl_expr::to_boolean()
{
if (type_->get_name() == VHDL_TYPE_STD_LOGIC) { if (type_->get_name() == VHDL_TYPE_STD_LOGIC) {
// '1' is true all else are false // '1' is true all else are false
vhdl_const_bit *one = new vhdl_const_bit('1'); vhdl_const_bit *one = new vhdl_const_bit('1');
@ -69,34 +135,13 @@ vhdl_expr *vhdl_expr::cast(const vhdl_type *to)
assert(false); assert(false);
} }
} }
else if (to->get_name() == VHDL_TYPE_INTEGER) {
vhdl_fcall *conv;
if (type_->get_name() == VHDL_TYPE_STD_LOGIC) {
require_support_function(SF_LOGIC_TO_INTEGER);
conv = new vhdl_fcall(support_function::function_name(SF_LOGIC_TO_INTEGER),
vhdl_type::integer());
}
else
conv = new vhdl_fcall("To_Integer", new vhdl_type(*to));
conv->add_expr(this); /*
* Generate code to convert and expression to std_logic.
return conv; */
} vhdl_expr *vhdl_expr::to_std_logic()
else if ((to->get_name() == VHDL_TYPE_UNSIGNED {
|| to->get_name() == VHDL_TYPE_SIGNED if (type_->get_name() == VHDL_TYPE_BOOLEAN) {
|| to->get_name() == VHDL_TYPE_STD_LOGIC_VECTOR) &&
type_->get_name() == VHDL_TYPE_STD_LOGIC) {
vhdl_expr *others = to->get_width() == 1 ? NULL : new vhdl_const_bit('0');
vhdl_bit_spec_expr *bs =
new vhdl_bit_spec_expr(new vhdl_type(*to), others);
bs->add_bit(0, this);
return bs;
}
else if (to->get_name() == VHDL_TYPE_STD_LOGIC &&
type_->get_name() == VHDL_TYPE_BOOLEAN) {
require_support_function(SF_BOOLEAN_TO_LOGIC); require_support_function(SF_BOOLEAN_TO_LOGIC);
vhdl_fcall *ah = vhdl_fcall *ah =
@ -106,8 +151,7 @@ vhdl_expr *vhdl_expr::cast(const vhdl_type *to)
return ah; return ah;
} }
else if (to->get_name() == VHDL_TYPE_STD_LOGIC else if (type_->get_name() == VHDL_TYPE_SIGNED) {
&& (type_->get_name() == VHDL_TYPE_SIGNED)) {
require_support_function(SF_SIGNED_TO_LOGIC); require_support_function(SF_SIGNED_TO_LOGIC);
vhdl_fcall *ah = vhdl_fcall *ah =
@ -117,8 +161,7 @@ vhdl_expr *vhdl_expr::cast(const vhdl_type *to)
return ah; return ah;
} }
else if (to->get_name() == VHDL_TYPE_STD_LOGIC else if (type_->get_name() == VHDL_TYPE_UNSIGNED) {
&& (type_->get_name() == VHDL_TYPE_UNSIGNED)) {
require_support_function(SF_UNSIGNED_TO_LOGIC); require_support_function(SF_UNSIGNED_TO_LOGIC);
vhdl_fcall *ah = vhdl_fcall *ah =
@ -128,21 +171,13 @@ vhdl_expr *vhdl_expr::cast(const vhdl_type *to)
return ah; return ah;
} }
else {
// We have to cast the expression before resizing or the
// wrong sign bit may be extended (i.e. when casting between
// signed/unsigned *and* resizing)
vhdl_fcall *conv =
new vhdl_fcall(to->get_string().c_str(), new vhdl_type(*to));
conv->add_expr(this);
if (to->get_width() != type_->get_width())
return conv->resize(to->get_width());
else else
return conv; assert(false);
}
} }
/*
* Change the width of a signed/unsigned type.
*/
vhdl_expr *vhdl_expr::resize(int newwidth) vhdl_expr *vhdl_expr::resize(int newwidth)
{ {
vhdl_type *rtype; vhdl_type *rtype;
@ -161,21 +196,20 @@ vhdl_expr *vhdl_expr::resize(int newwidth)
return resize; return resize;
} }
vhdl_expr *vhdl_const_int::cast(const vhdl_type *to) vhdl_expr *vhdl_const_int::to_vector(vhdl_type_name_t name, int w)
{ {
if (to->get_name() == VHDL_TYPE_SIGNED if (name == VHDL_TYPE_SIGNED || name == VHDL_TYPE_UNSIGNED) {
|| to->get_name() == VHDL_TYPE_UNSIGNED) {
const char *fname = to->get_name() == VHDL_TYPE_SIGNED const char *fname = name == VHDL_TYPE_SIGNED
? "To_Signed" : "To_Unsigned"; ? "To_Signed" : "To_Unsigned";
vhdl_fcall *conv = new vhdl_fcall(fname, new vhdl_type(*to)); vhdl_fcall *conv = new vhdl_fcall(fname, new vhdl_type(name, w - 1, 0));
conv->add_expr(this); conv->add_expr(this);
conv->add_expr(new vhdl_const_int(to->get_width())); conv->add_expr(new vhdl_const_int(w));
return conv; return conv;
} }
else else
return vhdl_expr::cast(to); return vhdl_expr::to_vector(name, w);
} }
int vhdl_const_bits::bits_to_int() const int vhdl_const_bits::bits_to_int() const
@ -193,9 +227,8 @@ int vhdl_const_bits::bits_to_int() const
return result; return result;
} }
vhdl_expr *vhdl_const_bits::cast(const vhdl_type *to) vhdl_expr *vhdl_const_bits::to_std_logic()
{ {
if (to->get_name() == VHDL_TYPE_STD_LOGIC) {
// VHDL won't let us cast directly between a vector and // VHDL won't let us cast directly between a vector and
// a scalar type // a scalar type
// But we don't need to here as we have the bits available // But we don't need to here as we have the bits available
@ -205,29 +238,33 @@ vhdl_expr *vhdl_const_bits::cast(const vhdl_type *to)
return new vhdl_const_bit(lsb); return new vhdl_const_bit(lsb);
} }
else if (to->get_name() == VHDL_TYPE_STD_LOGIC_VECTOR) {
vhdl_expr *vhdl_const_bits::to_vector(vhdl_type_name_t name, int w)
{
if (name == VHDL_TYPE_STD_LOGIC_VECTOR) {
// Don't need to do anything // Don't need to do anything
return this; return this;
} }
else if (to->get_name() == VHDL_TYPE_SIGNED else if (name == VHDL_TYPE_SIGNED || name == VHDL_TYPE_UNSIGNED) {
|| to->get_name() == VHDL_TYPE_UNSIGNED) {
// Extend with sign bit // Extend with sign bit
value_.resize(to->get_width(), value_[0]); value_.resize(w, value_[0]);
return this; return this;
} }
else if (to->get_name() == VHDL_TYPE_INTEGER)
return new vhdl_const_int(bits_to_int());
else else
return vhdl_expr::cast(to); assert(false);
} }
vhdl_expr *vhdl_const_bit::cast(const vhdl_type *to) vhdl_expr *vhdl_const_bits::to_integer()
{ {
if (to->get_name() == VHDL_TYPE_INTEGER) return new vhdl_const_int(bits_to_int());
return new vhdl_const_int(bit_ == '1' ? 1 : 0); }
else if (to->get_name() == VHDL_TYPE_BOOLEAN)
return new vhdl_const_bool(bit_ == '1'); vhdl_expr *vhdl_const_bit::to_integer()
else {
return vhdl_expr::cast(to); return new vhdl_const_int(bit_ == '1' ? 1 : 0);
}
vhdl_expr *vhdl_const_bit::to_boolean()
{
return new vhdl_const_bool(bit_ == '1');
} }

16
tgt-vhdl/vhdl_syntax.hh
View File

@ -36,8 +36,13 @@ public:
const vhdl_type *get_type() const { return type_; } const vhdl_type *get_type() const { return type_; }
bool constant() const { return isconst_; } bool constant() const { return isconst_; }
virtual vhdl_expr *cast(const vhdl_type *to);
vhdl_expr *cast(const vhdl_type *to);
virtual vhdl_expr *resize(int newwidth); virtual vhdl_expr *resize(int newwidth);
virtual vhdl_expr *to_boolean();
virtual vhdl_expr *to_integer();
virtual vhdl_expr *to_std_logic();
virtual vhdl_expr *to_vector(vhdl_type_name_t name, int w);
protected: protected:
vhdl_type *type_; vhdl_type *type_;
bool isconst_; bool isconst_;
@ -165,7 +170,9 @@ public:
vhdl_const_bits(const char *value, int width, bool issigned); vhdl_const_bits(const char *value, int width, bool issigned);
void emit(std::ostream &of, int level) const; void emit(std::ostream &of, int level) const;
const std::string &get_value() const { return value_; } const std::string &get_value() const { return value_; }
vhdl_expr *cast(const vhdl_type *to); vhdl_expr *to_integer();
vhdl_expr *to_std_logic();
vhdl_expr *to_vector(vhdl_type_name_t name, int w);
private: private:
int bits_to_int() const; int bits_to_int() const;
@ -178,7 +185,8 @@ public:
vhdl_const_bit(char bit) vhdl_const_bit(char bit)
: vhdl_expr(vhdl_type::std_logic(), true), bit_(bit) {} : vhdl_expr(vhdl_type::std_logic(), true), bit_(bit) {}
void emit(std::ostream &of, int level) const; void emit(std::ostream &of, int level) const;
vhdl_expr *cast(const vhdl_type *to); vhdl_expr *to_boolean();
vhdl_expr *to_integer();
private: private:
char bit_; char bit_;
}; };
@ -202,7 +210,7 @@ public:
vhdl_const_int(int64_t value) vhdl_const_int(int64_t value)
: vhdl_expr(vhdl_type::integer(), true), value_(value) {} : vhdl_expr(vhdl_type::integer(), true), value_(value) {}
void emit(std::ostream &of, int level) const; void emit(std::ostream &of, int level) const;
vhdl_expr *cast(const vhdl_type *to); vhdl_expr *to_vector(vhdl_type_name_t name, int w);
private: private:
int64_t value_; int64_t value_;
}; };