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Function arg. expressions need to use the expr. width and arg. width. 

When evaluating a function argument expression we need to use either
the expression width or the argument width which ever is larger. This
matches the way normal assignments work. We then only take the bits
needed at the end.
This commit is contained in:
Cary R 2009-12-17 16:32:44 -08:00 committed by Stephen Williams
parent 260828a095
commit b3d828885c
1 changed files with 11 additions and 6 deletions
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17
tgt-vvp/draw_ufunc.c
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@ -1,5 +1,5 @@
/*
* Copyright (c) 2005-2008 Stephen Williams (steve@icarus.com)
* Copyright (c) 2005-2009 Stephen Williams (steve@icarus.com)
*
* This source code is free software; you can redistribute it
* and/or modify it in source code form under the terms of the GNU
@ -28,16 +28,21 @@
static void function_argument_logic(ivl_signal_t port, ivl_expr_t exp)
{
struct vector_info res;
unsigned pwidth;
unsigned ewidth, pwidth;
/* ports cannot be arrays. */
assert(ivl_signal_dimensions(port) == 0);
res = draw_eval_expr_wid(exp, ivl_signal_width(port), 0);
/* We could have extra bits so only select the ones we need. */
ewidth = ivl_expr_width(exp);
pwidth = ivl_signal_width(port);
fprintf(vvp_out, " %%set/v v%p_0, %u, %u;\n", port, res.base,
(res.wid > pwidth) ? pwidth : res.wid);
/* Just like a normal assignment the function arguments need to
* be evaluated at either their width or the argument width if
* it is larger. */
if (ewidth < pwidth) ewidth = pwidth;
res = draw_eval_expr_wid(exp, ewidth, 0);
/* We could have extra bits so only select the ones we need. */
fprintf(vvp_out, " %%set/v v%p_0, %u, %u;\n", port, res.base, pwidth);
clr_vector(res);
}