luke
/
iverilog
mirror of https://github.com/steveicarus/iverilog.git
1
0
Fork 0
Code Issues Packages Projects Releases Wiki Activity

Resolve repeat ambiguity in favor of loop.

This commit is contained in:
steve 2001-01-02 17:28:08 +00:00
parent 120a211e68
commit ac7ae1ba6f
1 changed files with 7 additions and 3 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

10
ieee1364-notes.txt
View File

@ -192,13 +192,17 @@ to resolve this conflict, and the IEEE1364-2000 DRAFT does not improve
the situation.
Practice suggests that a repeat followed by an event control should be
interpreted as a procedural_timing_control_statement in preference to
to loop_statement interpretation, but the standard does not say this.
interpreted as a loop head, and this is what Icarus Verilog does, as
well as all the other major Verilog tools, but the standard does not
say this.
$Id: ieee1364-notes.txt,v 1.4 2001/01/01 19:12:35 steve Exp $
$Id: ieee1364-notes.txt,v 1.5 2001/01/02 17:28:08 steve Exp $
$Log: ieee1364-notes.txt,v $
Revision 1.5 2001/01/02 17:28:08 steve
Resolve repeat ambiguity in favor of loop.
Revision 1.4 2001/01/01 19:12:35 steve
repeat loops ambiguity.