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Update vhdlpp with changes suggested by cppcheck

This commit is contained in:
Cary R 2021-01-02 13:35:38 -08:00
parent fbe42f13e2
commit a56747b747
11 changed files with 29 additions and 30 deletions
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8
vhdlpp/architec.h
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@ -1,7 +1,7 @@
#ifndef IVL_architec_H #ifndef IVL_architec_H
#define IVL_architec_H #define IVL_architec_H
/* /*
* Copyright (c) 2011-2014 Stephen Williams (steve@icarus.com) * Copyright (c) 2011-2021 Stephen Williams (steve@icarus.com)
* *
* This source code is free software; you can redistribute it * This source code is free software; you can redistribute it
* and/or modify it in source code form under the terms of the GNU * and/or modify it in source code form under the terms of the GNU
@ -249,7 +249,7 @@ class ComponentInstantiation : public Architecture::Statement {
class StatementList : public Architecture::Statement { class StatementList : public Architecture::Statement {
public: public:
StatementList(std::list<SequentialStmt*>*statement_list); explicit StatementList(std::list<SequentialStmt*>*statement_list);
virtual ~StatementList(); virtual ~StatementList();
int elaborate(Entity*ent, Architecture*arc) { int elaborate(Entity*ent, Architecture*arc) {
@ -274,7 +274,7 @@ class StatementList : public Architecture::Statement {
// but we can still use it during the translation process. // but we can still use it during the translation process.
class InitialStatement : public StatementList { class InitialStatement : public StatementList {
public: public:
InitialStatement(std::list<SequentialStmt*>*statement_list) explicit InitialStatement(std::list<SequentialStmt*>*statement_list)
: StatementList(statement_list) {} : StatementList(statement_list) {}
int emit(ostream&out, Entity*entity, ScopeBase*scope); int emit(ostream&out, Entity*entity, ScopeBase*scope);
@ -285,7 +285,7 @@ class InitialStatement : public StatementList {
// but we can still use it during the translation process. // but we can still use it during the translation process.
class FinalStatement : public StatementList { class FinalStatement : public StatementList {
public: public:
FinalStatement(std::list<SequentialStmt*>*statement_list) explicit FinalStatement(std::list<SequentialStmt*>*statement_list)
: StatementList(statement_list) {} : StatementList(statement_list) {}
int emit(ostream&out, Entity*entity, ScopeBase*scope); int emit(ostream&out, Entity*entity, ScopeBase*scope);

4
vhdlpp/architec_elaborate.cc
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@ -1,5 +1,5 @@
/* /*
* Copyright (c) 2011-2012 Stephen Williams (steve@icarus.com) * Copyright (c) 2011-2021 Stephen Williams (steve@icarus.com)
* *
* This source code is free software; you can redistribute it * This source code is free software; you can redistribute it
* and/or modify it in source code form under the terms of the GNU * and/or modify it in source code form under the terms of the GNU
@ -250,7 +250,7 @@ int CondSignalAssignment::elaborate(Entity*ent, Architecture*arc)
// Visitor to extract signal names occurring in the conditional // Visitor to extract signal names occurring in the conditional
// statements to create the sensitivity list // statements to create the sensitivity list
struct name_extractor_t : public ExprVisitor { struct name_extractor_t : public ExprVisitor {
name_extractor_t(list<const ExpName*>& name_list) explicit name_extractor_t(list<const ExpName*>& name_list)
: name_list_(name_list) {} : name_list_(name_list) {}
void operator() (Expression*s) { void operator() (Expression*s) {
if(const ExpName*name = dynamic_cast<const ExpName*>(s)) if(const ExpName*name = dynamic_cast<const ExpName*>(s))

4
vhdlpp/debug.cc
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@ -1,5 +1,5 @@
/* /*
* Copyright (c) 2011 Stephen Williams (steve@icarus.com) * Copyright (c) 2011-2021 Stephen Williams (steve@icarus.com)
* Copyright (c) 2014 CERN * Copyright (c) 2014 CERN
* @author Maciej Suminski (maciej.suminski@cern.ch) * @author Maciej Suminski (maciej.suminski@cern.ch)
* *
@ -151,7 +151,7 @@ void ScopeBase::dump_scope(ostream&out) const
// Dump subprograms // Dump subprograms
out << " -- Imported Subprograms" << endl; out << " -- Imported Subprograms" << endl;
for (map<perm_string,SubHeaderList>::const_iterator cur = use_subprograms_.begin() for (map<perm_string,SubHeaderList>::const_iterator cur = use_subprograms_.begin()
; cur != cur_subprograms_.end() ; ++ cur) { ; cur != use_subprograms_.end() ; ++cur) {
const SubHeaderList& subp_list = cur->second; const SubHeaderList& subp_list = cur->second;
for(SubHeaderList::const_iterator it = subp_list.begin(); for(SubHeaderList::const_iterator it = subp_list.begin();

4
vhdlpp/library.cc
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@ -1,5 +1,5 @@
/* /*
* Copyright (c) 2011-2013 Stephen Williams (steve@icarus.com) * Copyright (c) 2011-2021 Stephen Williams (steve@icarus.com)
* Copyright CERN 2013 / Stephen Williams (steve@icarus.com) * Copyright CERN 2013 / Stephen Williams (steve@icarus.com)
* Copyright CERN 2016 * Copyright CERN 2016
* @author Maciej Suminski <maciej.suminski@cern.ch> * @author Maciej Suminski <maciej.suminski@cern.ch>
@ -455,7 +455,7 @@ int emit_packages(void)
errors += emit_packages(cur->first, cur->second.packages); errors += emit_packages(cur->first, cur->second.packages);
} }
return 0; return errors;
} }
static int elaborate_library_packages(map<perm_string,Package*>packages) static int elaborate_library_packages(map<perm_string,Package*>packages)

4
vhdlpp/main.cc
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@ -168,7 +168,7 @@ int main(int argc, char*argv[])
debug_log_file.open(debug_log_path); debug_log_file.open(debug_log_path);
} }
if ( (rc = mkdir(work_path, 0777)) < 0 ) { if ( (mkdir(work_path, 0777)) < 0 ) {
if (errno != EEXIST) { if (errno != EEXIST) {
fprintf(stderr, "Icarus Verilog VHDL unable to create work directory %s, errno=%d\n", work_path, errno); fprintf(stderr, "Icarus Verilog VHDL unable to create work directory %s, errno=%d\n", work_path, errno);
return -1; return -1;
@ -176,7 +176,7 @@ int main(int argc, char*argv[])
struct stat stat_buf; struct stat stat_buf;
rc = stat(work_path, &stat_buf); rc = stat(work_path, &stat_buf);
if (!S_ISDIR(stat_buf.st_mode)) { if (rc || !S_ISDIR(stat_buf.st_mode)) {
fprintf(stderr, "Icarus Verilog VHDL work path `%s' is not a directory.\n", work_path); fprintf(stderr, "Icarus Verilog VHDL work path `%s' is not a directory.\n", work_path);
return -1; return -1;
} }

4
vhdlpp/parse_types.h
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@ -1,7 +1,7 @@
#ifndef IVL_parse_types_H #ifndef IVL_parse_types_H
#define IVL_parse_types_H #define IVL_parse_types_H
/* /*
* Copyright (c) 2011-2015 Stephen Williams (steve@icarus.com) * Copyright (c) 2011-2021 Stephen Williams (steve@icarus.com)
* Copyright CERN 2013 / Stephen Williams (steve@icarus.com) * Copyright CERN 2013 / Stephen Williams (steve@icarus.com)
* *
* This source code is free software; you can redistribute it * This source code is free software; you can redistribute it
@ -78,7 +78,7 @@ struct adding_term {
// (VHDL-2008 6.4.2.5) // (VHDL-2008 6.4.2.5)
class file_open_info_t { class file_open_info_t {
public: public:
file_open_info_t(ExpString*filename__, ExpName*kind__ = NULL) explicit file_open_info_t(ExpString*filename__, ExpName*kind__ = NULL)
: kind_(kind__), filename_(filename__) { : kind_(kind__), filename_(filename__) {
// By default files are opened in read-only mode // By default files are opened in read-only mode
if(!kind_) kind_ = new ExpName(perm_string::literal("read_mode")); if(!kind_) kind_ = new ExpName(perm_string::literal("read_mode"));

16
vhdlpp/sequential.cc
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@ -50,17 +50,17 @@ IfSequential::IfSequential(Expression*cond, std::list<SequentialStmt*>*tr,
IfSequential::~IfSequential() IfSequential::~IfSequential()
{ {
delete cond_; delete cond_;
while (if_.size() > 0) { while (!if_.empty()) {
SequentialStmt*cur = if_.front(); SequentialStmt*cur = if_.front();
if_.pop_front(); if_.pop_front();
delete cur; delete cur;
} }
while (elsif_.size() > 0) { while (!elsif_.empty()) {
IfSequential::Elsif*cur = elsif_.front(); IfSequential::Elsif*cur = elsif_.front();
elsif_.pop_front(); elsif_.pop_front();
delete cur; delete cur;
} }
while (else_.size() > 0) { while (!else_.empty()) {
SequentialStmt*cur = else_.front(); SequentialStmt*cur = else_.front();
else_.pop_front(); else_.pop_front();
delete cur; delete cur;
@ -101,7 +101,7 @@ IfSequential::Elsif::Elsif(Expression*cond, std::list<SequentialStmt*>*tr)
IfSequential::Elsif::~Elsif() IfSequential::Elsif::~Elsif()
{ {
delete cond_; delete cond_;
while (if_.size() > 0) { while (!if_.empty()) {
SequentialStmt*cur = if_.front(); SequentialStmt*cur = if_.front();
if_.pop_front(); if_.pop_front();
delete cur; delete cur;
@ -133,7 +133,7 @@ CaseSeqStmt::CaseSeqStmt(Expression*cond, list<CaseSeqStmt::CaseStmtAlternative*
CaseSeqStmt::~CaseSeqStmt() CaseSeqStmt::~CaseSeqStmt()
{ {
delete cond_; delete cond_;
while(alt_.size() > 0) { while(!alt_.empty()) {
CaseSeqStmt::CaseStmtAlternative* cur = alt_.front(); CaseSeqStmt::CaseStmtAlternative* cur = alt_.front();
alt_.pop_front(); alt_.pop_front();
delete cur; delete cur;
@ -156,7 +156,7 @@ CaseSeqStmt::CaseStmtAlternative::CaseStmtAlternative(std::list<Expression*>*exp
CaseSeqStmt::CaseStmtAlternative::~CaseStmtAlternative() CaseSeqStmt::CaseStmtAlternative::~CaseStmtAlternative()
{ {
delete exp_; delete exp_;
while(stmts_.size() > 0) { while(!stmts_.empty()) {
SequentialStmt* cur = stmts_.front(); SequentialStmt* cur = stmts_.front();
stmts_.pop_front(); stmts_.pop_front();
delete cur; delete cur;
@ -194,7 +194,7 @@ ProcedureCall::~ProcedureCall()
if(!param_list_) if(!param_list_)
return; return;
while(param_list_->size() > 0) { while(!param_list_->empty()) {
named_expr_t* cur = param_list_->front(); named_expr_t* cur = param_list_->front();
param_list_->pop_front(); param_list_->pop_front();
delete cur; delete cur;
@ -227,7 +227,7 @@ LoopStatement::LoopStatement(perm_string name, list<SequentialStmt*>* stmts)
LoopStatement::~LoopStatement() LoopStatement::~LoopStatement()
{ {
while(stmts_.size() > 0) { while(!stmts_.empty()) {
SequentialStmt* cur = stmts_.front(); SequentialStmt* cur = stmts_.front();
stmts_.pop_front(); stmts_.pop_front();
delete cur; delete cur;

4
vhdlpp/sequential_elaborate.cc
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@ -1,5 +1,5 @@
/* /*
* Copyright (c) 2011 Stephen Williams (steve@icarus.com) * Copyright (c) 2011-2021 Stephen Williams (steve@icarus.com)
* *
* This source code is free software; you can redistribute it * This source code is free software; you can redistribute it
* and/or modify it in source code form under the terms of the GNU * and/or modify it in source code form under the terms of the GNU
@ -203,8 +203,8 @@ int ProcedureCall::elaborate(Entity*ent, ScopeBase*scope)
} }
// Elaborate arguments // Elaborate arguments
size_t idx = 0;
if(param_list_) { if(param_list_) {
size_t idx = 0;
for(list<named_expr_t*>::iterator cur = param_list_->begin() for(list<named_expr_t*>::iterator cur = param_list_->begin()
; cur != param_list_->end() ; ++cur) { ; cur != param_list_->end() ; ++cur) {
errors += def_->elaborate_argument((*cur)->expr(), idx, ent, scope); errors += def_->elaborate_argument((*cur)->expr(), idx, ent, scope);

4
vhdlpp/sequential_emit.cc
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@ -1,5 +1,5 @@
/* /*
* Copyright (c) 2011-2020 Stephen Williams (steve@icarus.com) * Copyright (c) 2011-2021 Stephen Williams (steve@icarus.com)
* Copyright CERN 2013 / Stephen Williams (steve@icarus.com) * Copyright CERN 2013 / Stephen Williams (steve@icarus.com)
* Copyright CERN 2015 * Copyright CERN 2015
* @author Maciej Suminski (maciej.suminski@cern.ch) * @author Maciej Suminski (maciej.suminski@cern.ch)
@ -296,8 +296,8 @@ int CaseSeqStmt::CaseStmtAlternative::emit(ostream&out, Entity*ent, ScopeBase*sc
{ {
int errors = 0; int errors = 0;
bool first = true;
if (exp_) { if (exp_) {
bool first = true;
for (list<Expression*>::iterator it = exp_->begin(); it != exp_->end(); ++it) { for (list<Expression*>::iterator it = exp_->begin(); it != exp_->end(); ++it) {
if(first) if(first)
first = false; first = false;

3
vhdlpp/std_types.cc
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@ -1,5 +1,5 @@
/* /*
* Copyright CERN 2015 * Copyright CERN 2015-2021
* @author Maciej Suminski (maciej.suminski@cern.ch) * @author Maciej Suminski (maciej.suminski@cern.ch)
* *
* This source code is free software; you can redistribute it * This source code is free software; you can redistribute it
@ -90,7 +90,6 @@ void generate_global_types(ActiveScope*res)
void delete_global_types() void delete_global_types()
{ {
typedef_context_t typedef_ctx;
for(map<perm_string, VTypeDef*>::iterator cur = std_types.begin(); for(map<perm_string, VTypeDef*>::iterator cur = std_types.begin();
cur != std_types.end(); ++cur) { cur != std_types.end(); ++cur) {
delete cur->second->peek_definition(); delete cur->second->peek_definition();

4
vhdlpp/vtype.h
View File

@ -1,7 +1,7 @@
#ifndef IVL_vtype_H #ifndef IVL_vtype_H
#define IVL_vtype_H #define IVL_vtype_H
/* /*
* Copyright (c) 2011-2014 Stephen Williams (steve@icarus.com) * Copyright (c) 2011-2021 Stephen Williams (steve@icarus.com)
* Copyright CERN 2014 / Stephen Williams (steve@icarus.com), * Copyright CERN 2014 / Stephen Williams (steve@icarus.com),
* @author Maciej Suminski (maciej.suminski@cern.ch) * @author Maciej Suminski (maciej.suminski@cern.ch)
* *
@ -161,7 +161,7 @@ class VTypePrimitive : public VType {
enum type_t { BIT, INTEGER, NATURAL, REAL, STDLOGIC, TIME }; enum type_t { BIT, INTEGER, NATURAL, REAL, STDLOGIC, TIME };
public: public:
VTypePrimitive(type_t tt, bool packed = false); explicit VTypePrimitive(type_t tt, bool packed = false);
~VTypePrimitive(); ~VTypePrimitive();
VType*clone() const { return new VTypePrimitive(*this); } VType*clone() const { return new VTypePrimitive(*this); }