vhdlpp: Added missing std_logic values in ExpChar and ExpString::emit().

This commit is contained in:
Maciej Suminski 2015-04-20 22:36:14 +02:00
parent d352d8ead3
commit a5138e238f
1 changed files with 42 additions and 39 deletions

View File

@ -34,6 +34,33 @@
using namespace std; using namespace std;
inline static int emit_logic(char val, ostream& out, const VTypePrimitive::type_t type)
{
// TODO case 'W': case 'L': case 'H':
switch (val) {
case '-': case 'U':
val = 'x';
/* fall through */
case 'X': case 'Z':
assert(type == VTypePrimitive::STDLOGIC);
/* fall through */
case '0':
case '1':
out << (char) tolower(val);
break;
default:
assert(false);
out << "x";
return 1;
}
return 0;
}
int Expression::emit(ostream&out, Entity*, ScopeBase*) int Expression::emit(ostream&out, Entity*, ScopeBase*)
{ {
out << " /* " << get_fileline() << ": internal error: " out << " /* " << get_fileline() << ": internal error: "
@ -396,23 +423,15 @@ int ExpBitstring::emit(ostream&out, Entity*, ScopeBase*)
int ExpCharacter::emit_primitive_bit_(ostream&out, Entity*, ScopeBase*, int ExpCharacter::emit_primitive_bit_(ostream&out, Entity*, ScopeBase*,
const VTypePrimitive*etype) const VTypePrimitive*etype)
{ {
switch (etype->type()) { out << "1'b";
case VTypePrimitive::BOOLEAN: int res = emit_logic(value_, out, etype->type());
case VTypePrimitive::BIT:
case VTypePrimitive::STDLOGIC:
switch (value_) {
case '0':
case '1':
out << "1'b" << value_;
return 0;
default:
break;
}
default: if(res)
return 1; cerr << get_fileline() << ": internal error: "
} << "Don't know how to handle bit " << value_
return 1; << " with etype==" << etype->type() << endl;
return res;
} }
int ExpCharacter::emit(ostream&out, Entity*ent, ScopeBase*scope) int ExpCharacter::emit(ostream&out, Entity*ent, ScopeBase*scope)
@ -991,29 +1010,13 @@ int ExpString::emit_as_array_(ostream& out, Entity*, ScopeBase*, const VTypeArra
assert(etype->type() != VTypePrimitive::INTEGER); assert(etype->type() != VTypePrimitive::INTEGER);
out << value_.size() << "'b"; out << value_.size() << "'b";
for (size_t idx = 0 ; idx < value_.size() ; idx += 1) { for (size_t idx = 0 ; idx < value_.size() ; idx += 1) {
switch (value_[idx]) { int res = emit_logic(value_[idx], out, etype->type());
case '0': errors += res;
out << "0";
break; if(res)
case '1': cerr << get_fileline() << ": internal error: "
out << "1"; << "Don't know how to handle bit " << value_[idx]
break; << " with etype==" << etype->type() << endl;
case 'z': case 'Z':
assert(etype->type() == VTypePrimitive::STDLOGIC);
out << "z";
break;
case '-':
assert(etype->type() == VTypePrimitive::STDLOGIC);
out << "x";
break;
default:
cerr << get_fileline() << ": internal error: "
<< "Don't know how to handle bit " << value_[idx]
<< " with etype==" << etype->type() << endl;
assert(etype->type() == VTypePrimitive::STDLOGIC);
out << "x";
break;
}
} }
return errors; return errors;