Modified rules for primitive gate port expression widths.
The IEEE standard states that the port expressions used for arrays of primitive gates must be the exact width required, but is silent about the requirements for single instances. The consensus among other simulators is that for input ports of single instances, the expression is silently truncated to a single bit. This patch also fixes a compiler crash if an error is found when elaborating a primitive gate port expression.
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788be63917
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11
elaborate.cc
11
elaborate.cc
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@ -812,7 +812,16 @@ void PGBuiltin::elaborate(Design*des, NetScope*scope) const
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sig = lval_sigs[idx];
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} else {
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NetExpr*tmp = elab_and_eval(des, scope, ex, -1);
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// If this is an array, the port expression is required
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// to be the exact width required (this will be checked
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// later). But if this is a single instance, consensus
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// is that we just take the LSB of the port expression.
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NetExpr*tmp = elab_and_eval(des, scope, ex, msb_ ? -1 : 1);
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if (tmp == 0)
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continue;
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if (msb_ == 0 && tmp->expr_width() != 1)
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tmp = new NetESelect(tmp, make_const_0(1), 1,
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IVL_SEL_IDX_UP);
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sig = tmp->synthesize(des, scope, tmp);
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delete tmp;
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}
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