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Add bitwise OR

This commit is contained in:
Nick Gasson 2008-07-04 12:05:49 +01:00
parent 3d0a2b55ce
commit a298b03735
1 changed files with 2 additions and 0 deletions
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2
tgt-vhdl/expr.cc
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@ -185,6 +185,8 @@ static vhdl_expr *translate_binary(ivl_expr_t e)
return translate_numeric(lhs, rhs, VHDL_BINOP_AND); return translate_numeric(lhs, rhs, VHDL_BINOP_AND);
case 'a': // Logical AND case 'a': // Logical AND
return translate_logical(lhs, rhs, VHDL_BINOP_AND); return translate_logical(lhs, rhs, VHDL_BINOP_AND);
case '|': // Bitwise OR
return translate_numeric(lhs, rhs, VHDL_BINOP_OR);
case 'o': // Logical OR case 'o': // Logical OR
return translate_logical(lhs, rhs, VHDL_BINOP_OR); return translate_logical(lhs, rhs, VHDL_BINOP_OR);
case '<': case '<':