Document memory related opcodes,
parser uses numbv_s structures instead of the
symbv_s and a mess of unions,
Add the %is/sub instruction.
(Stephan Boettcher)
This commit is contained in:
steve
parent
0f9eb13245
commit
a225fe304d
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@ -1,7 +1,7 @@
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/*
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* Copyright (c) 2001 Stephen Williams (steve@icarus.com)
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*
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* $Id: README.txt,v 1.22 2001/05/02 04:05:17 steve Exp $
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* $Id: README.txt,v 1.23 2001/05/02 23:16:50 steve Exp $
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*/
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VVP SIMULATION ENGINE
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@ -170,10 +170,6 @@ A UDP functor instance is created so:
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Where <label> identifies the functor, <type> is the label of a UDP
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defined earlier, and <symbol_list> is a list of symbols, one for each
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input of the UDP.
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ATTN: The "<name>" attribute of the UDP is pretty useless, and may go
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away in future versions. It may be useful for diagnostic messages,
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though.
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VARIABLE STATEMENTS:
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@ -334,18 +330,15 @@ initializes four memory bits. Two bits form each byte for each memory
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bit, in the ususal encoding.
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Procedural access to the memory employs an index register to address a
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bit location in the mememory, via the commands:
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bit location in the memory, via the commands:
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%load/mem <bit>, <memid>[<ix>] ;
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%set/mem <memid>[<ix>], <bit> ;
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%assign/mem <memid>[<ix>], <delay>, <bit> ;
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%load/m <bit>, <memid> ;
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%set/m <memid>, <bit> ;
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%assign/m <memid>, <delay>, <bit> ;
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??? is "/mem" required, or shall functors and memories share a
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namespace? ???
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<ix> identifies one of the four index registers of the current
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thread. The value of register <ix> is the index in the memories bit
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space, where each data word occupies a multiple of four bits.
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The memory bit is addressed by index register 3. The value of
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register 3 is the index in the memory's bit space, where each data
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word occupies a multiple of four bits.
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EVENT STATEMENTS
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10
vvp/codes.h
10
vvp/codes.h
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@ -19,7 +19,7 @@
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* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
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*/
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#if !defined(WINNT)
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#ident "$Id: codes.h,v 1.22 2001/05/02 01:57:25 steve Exp $"
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#ident "$Id: codes.h,v 1.23 2001/05/02 23:16:50 steve Exp $"
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#endif
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@ -52,6 +52,7 @@ extern bool of_INV(vthread_t thr, vvp_code_t code);
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extern bool of_IX_ADD(vthread_t thr, vvp_code_t code);
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extern bool of_IX_LOAD(vthread_t thr, vvp_code_t code);
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extern bool of_IX_MUL(vthread_t thr, vvp_code_t code);
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extern bool of_IX_SUB(vthread_t thr, vvp_code_t code);
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extern bool of_JMP(vthread_t thr, vvp_code_t code);
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extern bool of_JMP0(vthread_t thr, vvp_code_t code);
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extern bool of_JMP0XZ(vthread_t thr, vvp_code_t code);
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@ -126,6 +127,13 @@ extern void codespace_dump(FILE*fd);
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/*
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* $Log: codes.h,v $
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* Revision 1.23 2001/05/02 23:16:50 steve
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* Document memory related opcodes,
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* parser uses numbv_s structures instead of the
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* symbv_s and a mess of unions,
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* Add the %is/sub instruction.
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* (Stephan Boettcher)
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*
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* Revision 1.22 2001/05/02 01:57:25 steve
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* Support behavioral subtraction.
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*
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@ -17,7 +17,7 @@
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* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
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*/
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#if !defined(WINNT)
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#ident "$Id: compile.cc,v 1.52 2001/05/02 04:05:17 steve Exp $"
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#ident "$Id: compile.cc,v 1.53 2001/05/02 23:16:50 steve Exp $"
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#endif
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# include "compile.h"
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@ -56,9 +56,8 @@ enum operand_e {
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OA_CODE_PTR,
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/* The operand is a variable or net pointer */
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OA_FUNC_PTR,
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/* The operand is a memory, with index ... */
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OA_MEM_X3, /* ... hardwired index register 3 */
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OA_MEM_I1 /* ... index register in bit1 */
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/* The operand is a pointer to a memory */
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OA_MEM_PTR,
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};
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struct opcode_table_s {
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@ -73,7 +72,7 @@ const static struct opcode_table_s opcode_table[] = {
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{ "%add", of_ADD, 3, {OA_BIT1, OA_BIT2, OA_NUMBER} },
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{ "%and", of_AND, 3, {OA_BIT1, OA_BIT2, OA_NUMBER} },
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{ "%assign", of_ASSIGN, 3, {OA_FUNC_PTR, OA_BIT1, OA_BIT2} },
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{ "%assign/m",of_ASSIGN_MEM,3,{OA_MEM_X3, OA_BIT1, OA_BIT2} },
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{ "%assign/m",of_ASSIGN_MEM,3,{OA_MEM_PTR,OA_BIT1, OA_BIT2} },
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{ "%cmp/s", of_CMPS, 3, {OA_BIT1, OA_BIT2, OA_NUMBER} },
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{ "%cmp/u", of_CMPU, 3, {OA_BIT1, OA_BIT2, OA_NUMBER} },
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{ "%cmp/x", of_CMPX, 3, {OA_BIT1, OA_BIT2, OA_NUMBER} },
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@ -84,19 +83,20 @@ const static struct opcode_table_s opcode_table[] = {
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{ "%ix/add", of_IX_ADD, 2, {OA_BIT1, OA_NUMBER, OA_NONE} },
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{ "%ix/load",of_IX_LOAD,2, {OA_BIT1, OA_NUMBER, OA_NONE} },
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{ "%ix/mul", of_IX_MUL, 2, {OA_BIT1, OA_NUMBER, OA_NONE} },
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{ "%ix/sub", of_IX_SUB, 2, {OA_BIT1, OA_NUMBER, OA_NONE} },
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{ "%jmp", of_JMP, 1, {OA_CODE_PTR, OA_NONE, OA_NONE} },
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{ "%jmp/0", of_JMP0, 2, {OA_CODE_PTR, OA_BIT1, OA_NONE} },
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{ "%jmp/0xz",of_JMP0XZ, 2, {OA_CODE_PTR, OA_BIT1, OA_NONE} },
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{ "%jmp/1", of_JMP1, 2, {OA_CODE_PTR, OA_BIT1, OA_NONE} },
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{ "%join", of_JOIN, 0, {OA_NONE, OA_NONE, OA_NONE} },
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{ "%load", of_LOAD, 2, {OA_BIT1, OA_FUNC_PTR, OA_NONE} },
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{ "%load/m", of_LOAD_MEM,2, {OA_BIT2, OA_MEM_I1, OA_NONE} },
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{ "%load/m", of_LOAD_MEM,2, {OA_BIT1, OA_MEM_PTR, OA_NONE} },
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{ "%mov", of_MOV, 3, {OA_BIT1, OA_BIT2, OA_NUMBER} },
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{ "%noop", of_NOOP, 0, {OA_NONE, OA_NONE, OA_NONE} },
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{ "%nor/r", of_NORR, 3, {OA_BIT1, OA_BIT2, OA_NUMBER} },
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{ "%or", of_OR, 3, {OA_BIT1, OA_BIT2, OA_NUMBER} },
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{ "%set", of_SET, 2, {OA_FUNC_PTR, OA_BIT1, OA_NONE} },
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{ "%set/m", of_SET_MEM,2, {OA_MEM_I1, OA_BIT1, OA_NONE} },
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{ "%set/m", of_SET_MEM,2, {OA_MEM_PTR, OA_BIT1, OA_NONE} },
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{ "%sub", of_SUB, 3, {OA_BIT1, OA_BIT2, OA_NUMBER} },
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{ "%wait", of_WAIT, 1, {OA_FUNC_PTR, OA_NONE, OA_NONE} },
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{ "%xnor", of_XNOR, 3, {OA_BIT1, OA_BIT2, OA_NUMBER} },
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@ -692,8 +692,7 @@ void compile_code(char*label, char*mnem, comp_operands_t opa)
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code->number = opa->argv[idx].numb;
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break;
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case OA_MEM_I1:
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case OA_MEM_X3:
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case OA_MEM_PTR:
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if (opa->argv[idx].ltype != L_SYMB) {
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yyerror("operand format");
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break;
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@ -701,26 +700,7 @@ void compile_code(char*label, char*mnem, comp_operands_t opa)
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code->mem = memory_find(opa->argv[idx].symb.text);
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if (code->mem == 0) {
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yyerror("functor undefined");
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break;
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}
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if (opa->argv[idx].symb.idx >= 4) {
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yyerror("index operand out of range (0..3)");
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break;
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}
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switch(op->argt[idx]) {
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case OA_MEM_I1:
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code->bit_idx1 = (unsigned short)
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opa->argv[idx].symb.idx;
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break;
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case OA_MEM_X3:
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if (opa->argv[idx].symb.idx != 3)
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yyerror("index operand must be 3");
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break;
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default:
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break;
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yyerror("memory undefined");
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}
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free(opa->argv[idx].symb.text);
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@ -1064,6 +1044,13 @@ void compile_dump(FILE*fd)
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/*
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* $Log: compile.cc,v $
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* Revision 1.53 2001/05/02 23:16:50 steve
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* Document memory related opcodes,
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* parser uses numbv_s structures instead of the
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* symbv_s and a mess of unions,
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* Add the %is/sub instruction.
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* (Stephan Boettcher)
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*
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* Revision 1.52 2001/05/02 04:05:17 steve
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* Remove the init parameter of functors, and instead use
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* the special C<?> symbols to initialize inputs. This is
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@ -1,7 +1,7 @@
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/*
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* Copyright (c) 2001 Stephen Williams (steve@icarus.com)
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*
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* $Id: opcodes.txt,v 1.16 2001/05/02 01:57:26 steve Exp $
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* $Id: opcodes.txt,v 1.17 2001/05/02 23:16:50 steve Exp $
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*/
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@ -41,6 +41,15 @@ the assignment takes place. The delay may be 0. For blocking
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assignments, see %set. The <bit> is the address of the thread register
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that contains the bit value to assign.
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* %assign/m <memory-label>, <delay>, <bit>
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This instruction does a non-blocking assignment to a bit in a memory
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from the specified thread register <bit>. The memory bit is addressed
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by index register 3. Bit address zero is the LSB of the first memory
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word.
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* %cmp/u <bit-l>, <bit-r>, <wid>
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* %cmp/s <bit-l>, <bit-r>, <wid>
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@ -129,6 +138,16 @@ number. The idx value selects the index register, and may be 0, 1, 2
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or 3.
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* %ix/add <idx>, <value>
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* %ix/sub <idx>, <value>
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* %ix/mul <idx>, <value>
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This instruction adds, subtracts, or multiplies an immediate value to
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the addressed index register. The index register holds numeric values,
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so the <value> is a number. The <idx> value selects the index register,
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and may be 0, 1, 2 or 3.
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* %jmp <code-label>
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The %jmp instruction performs an unconditional branch to a given
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@ -169,6 +188,14 @@ functor within a vector of functors. This instruction loads only a
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single bit.
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* %load/m <bit>, <memory-label>
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This instruction loads a value from a memory bit into the specified
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thread register bit. The memory bit is addressed by index register 3.
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Bit address zero is the LSB of the first memory word. This
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instruction loads only a single bit.
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* %mov <dst>, <src>, <wid>
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This instruction copies a vector from one place in register space to
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@ -211,6 +238,14 @@ be read out of the variable. The <bit> is the address of the thread
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register that contains the bit value to assign.
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* %set/m <memory-label>, <bit>
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This instruction set a bit in a memory from the specified thread
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register bit. The memory bit is addressed by index register 3. Bit
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address zero is the LSB of the first memory word. This instruction
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sets only a single bit.
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* %sub <bit-l>, <bit-r>, <wid>
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This instruction arithmetically subtracts the right vector out of the
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14
vvp/parse.y
14
vvp/parse.y
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@ -19,7 +19,7 @@
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* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
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*/
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#if !defined(WINNT)
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#ident "$Id: parse.y,v 1.24 2001/05/02 04:05:17 steve Exp $"
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#ident "$Id: parse.y,v 1.25 2001/05/02 23:16:50 steve Exp $"
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#endif
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# include "parse_misc.h"
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@ -45,6 +45,8 @@ extern FILE*yyin;
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struct symb_s symb;
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struct symbv_s symbv;
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struct numbv_s numbv;
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struct symb_s vect;
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struct argv_s argv;
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@ -66,7 +68,8 @@ extern FILE*yyin;
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%token <vect> T_VECTOR
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%type <symb> symbol symbol_opt
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%type <symbv> symbols symbols_net numbers
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%type <symbv> symbols symbols_net
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%type <numbv> numbers
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%type <text> label_opt
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%type <opa> operand operands operands_opt
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%type <table> udp_table
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@ -426,6 +429,13 @@ int compile_design(const char*path)
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/*
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* $Log: parse.y,v $
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* Revision 1.25 2001/05/02 23:16:50 steve
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* Document memory related opcodes,
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* parser uses numbv_s structures instead of the
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* symbv_s and a mess of unions,
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* Add the %is/sub instruction.
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* (Stephan Boettcher)
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*
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* Revision 1.24 2001/05/02 04:05:17 steve
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* Remove the init parameter of functors, and instead use
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* the special C<?> symbols to initialize inputs. This is
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|
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@ -17,7 +17,7 @@
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* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
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*/
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#if !defined(WINNT)
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#ident "$Id: parse_misc.cc,v 1.4 2001/05/01 01:09:39 steve Exp $"
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#ident "$Id: parse_misc.cc,v 1.5 2001/05/02 23:16:50 steve Exp $"
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#endif
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# include "parse_misc.h"
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@ -46,6 +46,12 @@ void symbv_add(struct symbv_s*obj, struct symb_s item)
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obj->cnt += 1;
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}
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void numbv_init(struct numbv_s*obj)
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{
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obj->cnt = 0;
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obj->nvec = 0;
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}
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void numbv_add(struct numbv_s*obj, long item)
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{
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obj->nvec = (long*) realloc(obj->nvec, (obj->cnt+1) * sizeof(long));
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@ -69,6 +75,13 @@ void argv_add(struct argv_s*obj, vpiHandle item)
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/*
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* $Log: parse_misc.cc,v $
|
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* Revision 1.5 2001/05/02 23:16:50 steve
|
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* Document memory related opcodes,
|
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* parser uses numbv_s structures instead of the
|
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* symbv_s and a mess of unions,
|
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* Add the %is/sub instruction.
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* (Stephan Boettcher)
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*
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* Revision 1.4 2001/05/01 01:09:39 steve
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* Add support for memory objects. (Stephan Boettcher)
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*
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|
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@ -19,7 +19,7 @@
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* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
|
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*/
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#if !defined(WINNT)
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#ident "$Id: parse_misc.h,v 1.4 2001/05/01 01:09:39 steve Exp $"
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#ident "$Id: parse_misc.h,v 1.5 2001/05/02 23:16:50 steve Exp $"
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#endif
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@ -50,17 +50,18 @@ struct symb_s {
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struct symbv_s {
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unsigned cnt;
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union {
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struct symb_s*vect;
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long*nvec;
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};
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struct symb_s*vect;
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};
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extern void symbv_init(struct symbv_s*obj);
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extern void symbv_add(struct symbv_s*obj, struct symb_s item);
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#define numbv_s symbv_s
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#define numbv_init symbv_init
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struct numbv_s {
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unsigned cnt;
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long*nvec;
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};
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extern void numbv_init(struct numbv_s*obj);
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extern void numbv_add(struct numbv_s*obj, long item);
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@ -75,6 +76,13 @@ extern void argv_add(struct argv_s*obj, vpiHandle);
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/*
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* $Log: parse_misc.h,v $
|
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* Revision 1.5 2001/05/02 23:16:50 steve
|
||||
* Document memory related opcodes,
|
||||
* parser uses numbv_s structures instead of the
|
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* symbv_s and a mess of unions,
|
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* Add the %is/sub instruction.
|
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* (Stephan Boettcher)
|
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*
|
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* Revision 1.4 2001/05/01 01:09:39 steve
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* Add support for memory objects. (Stephan Boettcher)
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*
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|
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|
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@ -17,7 +17,7 @@
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* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
|
||||
*/
|
||||
#if !defined(WINNT)
|
||||
#ident "$Id: vthread.cc,v 1.33 2001/05/02 01:57:26 steve Exp $"
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#ident "$Id: vthread.cc,v 1.34 2001/05/02 23:16:50 steve Exp $"
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#endif
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# include "vthread.h"
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@ -168,6 +168,7 @@ vthread_t vthread_new(unsigned long pc, struct __vpiScope*scope)
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thr->is_scheduled = 0;
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thr->i_have_ended = 0;
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thr->waiting_for_event = 0;
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thr->is_scheduled = 0;
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thr_put_bit(thr, 0, 0);
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||||
thr_put_bit(thr, 1, 1);
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||||
|
|
@ -626,20 +627,24 @@ bool of_INV(vthread_t thr, vvp_code_t cp)
|
|||
|
||||
|
||||
/*
|
||||
** Index registers, signed arithmetic.
|
||||
** Index registers, unsigned arithmetic.
|
||||
*/
|
||||
|
||||
bool of_IX_ADD(vthread_t thr, vvp_code_t cp)
|
||||
{
|
||||
int number = (int)cp->number; // signed
|
||||
thr->index[cp->bit_idx1 & 3] += number;
|
||||
thr->index[cp->bit_idx1 & 3] += cp->number;
|
||||
return true;
|
||||
}
|
||||
|
||||
bool of_IX_SUB(vthread_t thr, vvp_code_t cp)
|
||||
{
|
||||
thr->index[cp->bit_idx1 & 3] -= cp->number;
|
||||
return true;
|
||||
}
|
||||
|
||||
bool of_IX_MUL(vthread_t thr, vvp_code_t cp)
|
||||
{
|
||||
int number = (int)cp->number; // signed
|
||||
thr->index[cp->bit_idx1 & 3] *= number;
|
||||
thr->index[cp->bit_idx1 & 3] *= cp->number;
|
||||
return true;
|
||||
}
|
||||
|
||||
|
|
@ -714,9 +719,8 @@ bool of_LOAD(vthread_t thr, vvp_code_t cp)
|
|||
bool of_LOAD_MEM(vthread_t thr, vvp_code_t cp)
|
||||
{
|
||||
assert(cp->bit_idx1 >= 4);
|
||||
assert(cp->bit_idx2 < 4);
|
||||
unsigned char val = memory_get(cp->mem, thr->index[cp->bit_idx1]);
|
||||
thr_put_bit(thr, cp->bit_idx2, val);
|
||||
unsigned char val = memory_get(cp->mem, thr->index[3]);
|
||||
thr_put_bit(thr, cp->bit_idx1, val);
|
||||
return true;
|
||||
}
|
||||
|
||||
|
|
@ -809,9 +813,8 @@ bool of_SET(vthread_t thr, vvp_code_t cp)
|
|||
|
||||
bool of_SET_MEM(vthread_t thr, vvp_code_t cp)
|
||||
{
|
||||
assert(cp->bit_idx2 < 4);
|
||||
unsigned char val = thr_get_bit(thr, cp->bit_idx2);
|
||||
memory_set(cp->mem, thr->index[cp->bit_idx1], val);
|
||||
unsigned char val = thr_get_bit(thr, cp->bit_idx1);
|
||||
memory_set(cp->mem, thr->index[3], val);
|
||||
|
||||
return true;
|
||||
}
|
||||
|
|
@ -966,6 +969,13 @@ bool of_ZOMBIE(vthread_t thr, vvp_code_t)
|
|||
|
||||
/*
|
||||
* $Log: vthread.cc,v $
|
||||
* Revision 1.34 2001/05/02 23:16:50 steve
|
||||
* Document memory related opcodes,
|
||||
* parser uses numbv_s structures instead of the
|
||||
* symbv_s and a mess of unions,
|
||||
* Add the %is/sub instruction.
|
||||
* (Stephan Boettcher)
|
||||
*
|
||||
* Revision 1.33 2001/05/02 01:57:26 steve
|
||||
* Support behavioral subtraction.
|
||||
*
|
||||
|
|
|
|||
Loading…
Reference in New Issue