Fix for br994 - assertion failure when synthesising a mux.

The elaborator allows the RHS of assignment to be wider than the
LHS. When using an if statement to represent a mux, this meant the
mux inputs could be different widths, resulting in an assertion
failure during synthesis. The fix is to prune the RHS to match the
LHS for each assignment. This has the benefit of minimising the
mux width.

synth2.cc

@@ -226,6 +226,8 @@ bool NetAssignBase::synth_async(Design*des, NetScope*scope,
 	    rsig = tmp;
       }
 
+      rsig = crop_to_width(des, rsig, lsig->vector_width());
+
       if (nex_out.pin_count() > 1) {
 	    NexusSet tmp_set;
 	    nex_output(tmp_set);