Generate .net statements, and nexus inputs.
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@ -17,16 +17,89 @@
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* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
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* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
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*/
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*/
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#if !defined(WINNT)
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#if !defined(WINNT)
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#ident "$Id: vvp_scope.c,v 1.1 2001/03/21 01:49:43 steve Exp $"
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#ident "$Id: vvp_scope.c,v 1.2 2001/03/25 03:25:43 steve Exp $"
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#endif
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#endif
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# include "vvp_priv.h"
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# include "vvp_priv.h"
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# include <assert.h>
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# include <assert.h>
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/*
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/*
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* This function draws the major functional items within a scope. This
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* The draw_scope function draws the major functional items within a
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* includes the scopes themselves, of course.
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* scope. This includes the scopes themselves, of course. All the
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* other functions in this file are in support of that task.
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*/
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*/
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/*
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* This function takes a nexus and looks for an input functor. It then
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* draws to the output a string that represents that functor.
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*/
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static void draw_nexus_input(ivl_nexus_t nex)
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{
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ivl_net_logic_t lptr;
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ivl_signal_t sptr;
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unsigned ndx;
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for (ndx = 0 ; ndx < ivl_nexus_ptrs(nex) ; ndx += 1) {
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ivl_nexus_ptr_t nptr = ivl_nexus_ptr(nex, ndx);
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lptr = ivl_nexus_ptr_log(nptr);
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if (lptr && (ivl_logic_type(lptr) == IVL_LO_BUFZ)) {
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draw_nexus_input(ivl_logic_pin(lptr, 1));
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return;
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}
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if (lptr && (ivl_nexus_ptr_pin(nptr) == 0)) {
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fprintf(vvp_out, "L_%s", ivl_logic_name(lptr));
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return;
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}
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sptr = ivl_nexus_ptr_sig(nptr);
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if (sptr && (ivl_signal_type(sptr) == IVL_SIT_REG)) {
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fprintf(vvp_out, "V_%s", ivl_signal_name(sptr));
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return;
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}
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}
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}
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/*
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* This function draws a reg/int/variable in the scope. This is a very
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* simple device to draw as there are no inputs to connect so no need
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* to scan the nexus.
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*/
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static void draw_reg_in_scope(ivl_signal_t sig)
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{
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int msb = ivl_signal_pins(sig) - 1;
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int lsb = 0;
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fprintf(vvp_out, "V_%s .var \"%s\", %d, %d;\n",
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ivl_signal_name(sig), ivl_signal_basename(sig),
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msb, lsb);
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}
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/*
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* This function draws a net. This is a bit more complicated as we
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* have to find an appropriate functor to connect to the input.
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*/
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static void draw_net_in_scope(ivl_signal_t sig)
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{
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unsigned idx;
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int msb = ivl_signal_pins(sig) - 1;
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int lsb = 0;
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fprintf(vvp_out, "V_%s .net \"%s\", %d, %d",
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ivl_signal_name(sig), ivl_signal_basename(sig),
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msb, lsb);
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for (idx = 0 ; idx < ivl_signal_pins(sig) ; idx += 1) {
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ivl_nexus_t nex = ivl_signal_pin(sig, idx);
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fprintf(vvp_out, ", ");
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draw_nexus_input(nex);
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}
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fprintf(vvp_out, ";\n");
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}
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int draw_scope(ivl_scope_t net, ivl_scope_t parent)
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int draw_scope(ivl_scope_t net, ivl_scope_t parent)
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{
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{
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unsigned idx;
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unsigned idx;
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@ -40,14 +113,48 @@ int draw_scope(ivl_scope_t net, ivl_scope_t parent)
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ivl_scope_name(net), ivl_scope_name(net));
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ivl_scope_name(net), ivl_scope_name(net));
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for (idx = 0 ; idx < ivl_scope_logs(net) ; idx += 1) {
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unsigned pdx;
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ivl_net_logic_t lptr = ivl_scope_log(net, idx);
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const char*ltype = "?";
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/* Skip BUFZ objects. Things that have a bufz as input
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will use the input to bufz instead. */
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if (ivl_logic_type(lptr) == IVL_LO_BUFZ)
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continue;
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switch (ivl_logic_type(lptr)) {
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default:
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ltype = "?";
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break;
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}
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assert(ivl_logic_pins(lptr) <= 5);
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fprintf(vvp_out, "L_%s .functor %s",
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ivl_logic_name(lptr), ltype);
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for (pdx = 1 ; pdx < ivl_logic_pins(lptr) ; pdx += 1) {
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ivl_nexus_t nex = ivl_logic_pin(lptr, pdx);
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fprintf(vvp_out, ", ");
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draw_nexus_input(nex);
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}
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fprintf(vvp_out, ";\n");
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}
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for (idx = 0 ; idx < ivl_scope_sigs(net) ; idx += 1) {
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for (idx = 0 ; idx < ivl_scope_sigs(net) ; idx += 1) {
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ivl_signal_t sig = ivl_scope_sig(net, idx);
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ivl_signal_t sig = ivl_scope_sig(net, idx);
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int msb = ivl_signal_pins(sig) - 1;
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int lsb = 0;
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fprintf(vvp_out, "V_%s .var \"%s\", %d, %d;\n",
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switch (ivl_signal_type(sig)) {
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ivl_signal_name(sig), ivl_signal_basename(sig),
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case IVL_SIT_REG:
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msb, lsb);
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draw_reg_in_scope(sig);
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break;
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default:
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draw_net_in_scope(sig);
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break;
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}
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}
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}
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ivl_scope_children(net, draw_scope, net);
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ivl_scope_children(net, draw_scope, net);
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@ -56,6 +163,9 @@ int draw_scope(ivl_scope_t net, ivl_scope_t parent)
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/*
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/*
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* $Log: vvp_scope.c,v $
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* $Log: vvp_scope.c,v $
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* Revision 1.2 2001/03/25 03:25:43 steve
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* Generate .net statements, and nexus inputs.
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*
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* Revision 1.1 2001/03/21 01:49:43 steve
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* Revision 1.1 2001/03/21 01:49:43 steve
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* Scan the scopes of a design, and draw behavioral
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* Scan the scopes of a design, and draw behavioral
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* blocking assignments of constants to vectors.
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* blocking assignments of constants to vectors.
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