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driver: Update manpage 

Signed-off-by: Andrew Andrianov <andrew@ncrmnt.org>
This commit is contained in:
Andrew Andrianov 2017-10-19 11:40:50 +03:00
parent 6c2fba1139
commit 94e42e5bfc
1 changed files with 6 additions and 2 deletions
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8
driver/iverilog.man.in
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@ -310,8 +310,8 @@ after a \fB\-Wall\fP argument to suppress isolated warning types.
.TP 8
.B all
This enables the anachronisms, implicit, portbind, select\-range,
timescale, and sensitivity\-entire\-array warning categories.
This enables the anachronisms, implicit, macro-redefinition, portbind,
select\-range, timescale, and sensitivity\-entire\-array warning categories.
.TP 8
.B anachronisms
@ -324,6 +324,10 @@ This enables warnings for creation of implicit declarations. For
example, if a scalar wire X is used but not declared in the Verilog
source, this will print a warning at its first use.
.TP 8
.B macro-redefinition
This enables preprocessor warnings when a macro is being redefined.
.TP 8
.B portbind
This enables warnings for ports of module instantiations that are not