Optimize some common vvp_bit4_t operators.
By slightly altering the vvp_bit4_t encoding, a few simple optimizations become possible. By making Z==2 and X==3, the conversion from X/Z to X is a simple shift-or, and this can be used to reduce the size of some of the bit4 operators.
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@ -44,6 +44,7 @@ vvp_bit4_t add_with_carry(vvp_bit4_t a, vvp_bit4_t b, vvp_bit4_t&c)
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switch (sum) {
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switch (sum) {
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case 0:
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case 0:
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// c must already be 0.
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return BIT4_0;
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return BIT4_0;
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case 1:
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case 1:
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c = BIT4_0;
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c = BIT4_0;
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@ -79,11 +80,7 @@ vvp_bit4_t operator | (vvp_bit4_t a, vvp_bit4_t b)
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return BIT4_1;
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return BIT4_1;
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if (b == BIT4_1)
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if (b == BIT4_1)
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return BIT4_1;
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return BIT4_1;
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if (bit4_is_xz(a))
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return bit4_z2x( (vvp_bit4_t) ((int)a | (int)b) );
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return BIT4_X;
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if (bit4_is_xz(b))
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return BIT4_X;
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return BIT4_0;
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}
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}
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vvp_bit4_t operator ^ (vvp_bit4_t a, vvp_bit4_t b)
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vvp_bit4_t operator ^ (vvp_bit4_t a, vvp_bit4_t b)
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@ -99,18 +96,6 @@ vvp_bit4_t operator ^ (vvp_bit4_t a, vvp_bit4_t b)
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return BIT4_0;
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return BIT4_0;
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}
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}
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vvp_bit4_t operator ~ (vvp_bit4_t a)
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{
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switch (a) {
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case BIT4_0:
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return BIT4_1;
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case BIT4_1:
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return BIT4_0;
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default:
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return BIT4_X;
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}
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}
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ostream& operator<<(ostream&out, vvp_bit4_t bit)
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ostream& operator<<(ostream&out, vvp_bit4_t bit)
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{
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{
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switch (bit) {
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switch (bit) {
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@ -57,8 +57,8 @@ class vvp_delay_t;
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enum vvp_bit4_t {
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enum vvp_bit4_t {
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BIT4_0 = 0,
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BIT4_0 = 0,
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BIT4_1 = 1,
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BIT4_1 = 1,
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BIT4_X = 2,
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BIT4_X = 3,
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BIT4_Z = 3
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BIT4_Z = 2
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};
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};
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extern vvp_bit4_t add_with_carry(vvp_bit4_t a, vvp_bit4_t b, vvp_bit4_t&c);
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extern vvp_bit4_t add_with_carry(vvp_bit4_t a, vvp_bit4_t b, vvp_bit4_t&c);
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@ -67,11 +67,25 @@ extern vvp_bit4_t add_with_carry(vvp_bit4_t a, vvp_bit4_t b, vvp_bit4_t&c);
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implementation here relies on the encoding of vvp_bit4_t values. */
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implementation here relies on the encoding of vvp_bit4_t values. */
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inline bool bit4_is_xz(vvp_bit4_t a) { return a >= 2; }
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inline bool bit4_is_xz(vvp_bit4_t a) { return a >= 2; }
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/* This function converts BIT4_Z to BIT4_X, but passes other values
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unchanged. This fast implementation relies of the encoding of the
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vvp_bit4_t values. In particular, the BIT4_X==3 and BIT4_Z==2 */
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inline vvp_bit4_t bit4_z2x(vvp_bit4_t a)
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{ return (vvp_bit4_t) ( (int)a | ((int)a >> 1) ); }
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/* Some common boolean operators. These implement the Verilog rules
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/* Some common boolean operators. These implement the Verilog rules
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for 4-value bit operations. */
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for 4-value bit operations. The fast implementations here rely
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extern vvp_bit4_t operator ~ (vvp_bit4_t a);
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on the encoding of vvp_bit4_t values. */
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extern vvp_bit4_t operator & (vvp_bit4_t a, vvp_bit4_t b);
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// ~BIT4_0 --> BIT4_1
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// ~BIT4_1 --> BIT4_0
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// ~BIT4_X --> BIT4_X
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// ~BIT4_Z --> BIT4_X
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inline vvp_bit4_t operator ~ (vvp_bit4_t a)
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{ return bit4_z2x((vvp_bit4_t) (((int)a) ^ 1)); }
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extern vvp_bit4_t operator | (vvp_bit4_t a, vvp_bit4_t b);
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extern vvp_bit4_t operator | (vvp_bit4_t a, vvp_bit4_t b);
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extern vvp_bit4_t operator & (vvp_bit4_t a, vvp_bit4_t b);
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extern vvp_bit4_t operator ^ (vvp_bit4_t a, vvp_bit4_t b);
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extern vvp_bit4_t operator ^ (vvp_bit4_t a, vvp_bit4_t b);
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extern ostream& operator<< (ostream&o, vvp_bit4_t a);
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extern ostream& operator<< (ostream&o, vvp_bit4_t a);
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@ -195,13 +209,13 @@ inline vvp_vector4_t::vvp_vector4_t(unsigned size, vvp_bit4_t val)
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const static unsigned long init_atable[4] = {
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const static unsigned long init_atable[4] = {
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WORD_0_ABITS,
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WORD_0_ABITS,
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WORD_1_ABITS,
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WORD_1_ABITS,
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WORD_X_ABITS,
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WORD_Z_ABITS,
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WORD_Z_ABITS };
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WORD_X_ABITS };
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const static unsigned long init_btable[4] = {
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const static unsigned long init_btable[4] = {
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WORD_0_BBITS,
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WORD_0_BBITS,
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WORD_1_BBITS,
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WORD_1_BBITS,
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WORD_X_BBITS,
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WORD_Z_BBITS,
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WORD_Z_BBITS };
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WORD_X_BBITS };
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allocate_words_(size, init_atable[val], init_btable[val]);
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allocate_words_(size, init_atable[val], init_btable[val]);
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}
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}
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