Introduce PCB code generator.
This commit is contained in:
Stephen Williams
parent
b37d806ee1
commit
9075326bb7
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@ -28,6 +28,7 @@ Makefile
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/_pli_types.h
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config.h
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/tgt-pcb/pcb_config.h
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/tgt-vvp/vvp_config.h
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/tgt-vhdl/vhdl_config.h
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/vpi/vpi_config.h
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@ -39,7 +39,7 @@ srcdir = @srcdir@
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datarootdir = @datarootdir@
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SUBDIRS = ivlpp vhdlpp vvp vpi libveriuser cadpli tgt-null tgt-stub tgt-vvp \
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tgt-vhdl tgt-vlog95 driver
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tgt-vhdl tgt-vlog95 tgt-pcb driver
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# Only run distclean for these directories.
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NOTUSED = tgt-fpga tgt-pal tgt-verilog
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@ -8,6 +8,7 @@ AC_CONFIG_HEADER(vpi/vpi_config.h)
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AC_CONFIG_HEADER(libveriuser/config.h)
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AC_CONFIG_HEADER(tgt-vvp/vvp_config.h)
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AC_CONFIG_HEADER(tgt-vhdl/vhdl_config.h)
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AC_CONFIG_HEADER(tgt-pcb/pcb_config.h)
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AC_CANONICAL_HOST
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dnl Checks for programs.
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@ -299,4 +300,4 @@ AC_MSG_RESULT(ok)
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# XXX disable tgt-fpga for the moment
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AC_OUTPUT(Makefile ivlpp/Makefile vhdlpp/Makefile vvp/Makefile vpi/Makefile driver/Makefile driver-vpi/Makefile cadpli/Makefile libveriuser/Makefile tgt-null/Makefile tgt-stub/Makefile tgt-vvp/Makefile tgt-vhdl/Makefile tgt-fpga/Makefile tgt-verilog/Makefile tgt-pal/Makefile tgt-vlog95/Makefile)
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AC_OUTPUT(Makefile ivlpp/Makefile vhdlpp/Makefile vvp/Makefile vpi/Makefile driver/Makefile driver-vpi/Makefile cadpli/Makefile libveriuser/Makefile tgt-null/Makefile tgt-stub/Makefile tgt-vvp/Makefile tgt-vhdl/Makefile tgt-fpga/Makefile tgt-verilog/Makefile tgt-pal/Makefile tgt-vlog95/Makefile tgt-pcb/Makefile)
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@ -0,0 +1,109 @@
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#
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# This source code is free software; you can redistribute it
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# and/or modify it in source code form under the terms of the GNU
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# Library General Public License as published by the Free Software
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# Foundation; either version 2 of the License, or (at your option)
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# any later version.
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#
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# This program is distributed in the hope that it will be useful,
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# but WITHOUT ANY WARRANTY; without even the implied warranty of
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# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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# GNU Library General Public License for more details.
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#
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# You should have received a copy of the GNU Library General Public
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# License along with this program; if not, write to the Free
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# Software Foundation, Inc.,
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# 59 Temple Place - Suite 330
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# Boston, MA 02111-1307, USA
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#
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SHELL = /bin/sh
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suffix = @install_suffix@
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prefix = @prefix@
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exec_prefix = @exec_prefix@
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srcdir = @srcdir@
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VPATH = $(srcdir)
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bindir = @bindir@
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libdir = @libdir@
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CC = @CC@
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CXX = @CXX@
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INSTALL = @INSTALL@
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INSTALL_PROGRAM = @INSTALL_PROGRAM@
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INSTALL_DATA = @INSTALL_DATA@
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ifeq (@srcdir@,.)
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INCLUDE_PATH = -I. -I..
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else
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INCLUDE_PATH = -I. -I.. -I$(srcdir) -I$(srcdir)/..
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endif
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CPPFLAGS = $(INCLUDE_PATH) @CPPFLAGS@ @DEFS@ @PICFLAG@
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CFLAGS = @WARNING_FLAGS@ @CFLAGS@
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LDFLAGS = @LDFLAGS@
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O = pcb.o scope.o show_netlist.o
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all: dep pcb.tgt
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check: all
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clean:
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rm -rf *.o dep pcb.tgt
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distclean: clean
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rm -f Makefile config.log
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cppcheck: $(O:.o=.c)
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cppcheck --enable=all -f $(INCLUDE_PATH) $^
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Makefile: $(srcdir)/Makefile.in ../config.status
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cd ..; ./config.status --file=tgt-pcb/$@
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dep:
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mkdir dep
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%.o: %.c
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$(CC) $(CPPFLAGS) $(CFLAGS) @DEPENDENCY_FLAG@ -c $< -o $*.o
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mv $*.d dep
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%.o: %.cc
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$(CXX) $(CPPFLAGS) $(CXXFLAGS) @DEPENDENCY_FLAG@ -c $< -o $*.o
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mv $*.d dep
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ifeq (@WIN32@,yes)
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TGTLDFLAGS=-L.. -livl
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TGTDEPLIBS=../libivl.a
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else
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TGTLDFLAGS=
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TGTDEPLIBS=
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endif
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pcb.tgt: $O $(TGTDEPLIBS)
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$(CC) @shared@ -o $@ $O $(TGTLDFLAGS)
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install: all installdirs $(libdir)/ivl$(suffix)/pcb.tgt $(INSTALL_DOC) $(libdir)/ivl$(suffix)/pcb.conf $(libdir)/ivl$(suffix)/pcb-s.conf
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$(libdir)/ivl$(suffix)/pcb.tgt: ./pcb.tgt
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$(INSTALL_PROGRAM) ./pcb.tgt "$(DESTDIR)$(libdir)/ivl$(suffix)/pcb.tgt"
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$(libdir)/ivl$(suffix)/pcb.conf: $(srcdir)/pcb.conf
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$(INSTALL_DATA) $(srcdir)/pcb.conf "$(DESTDIR)$(libdir)/ivl$(suffix)/pcb.conf"
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$(libdir)/ivl$(suffix)/pcb-s.conf: $(srcdir)/pcb-s.conf
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$(INSTALL_DATA) $(srcdir)/pcb-s.conf "$(DESTDIR)$(libdir)/ivl$(suffix)/pcb-s.conf"
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installdirs: $(srcdir)/../mkinstalldirs
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$(srcdir)/../mkinstalldirs "$(DESTDIR)$(bindir)" "$(DESTDIR)$(libdir)/ivl$(suffix)"
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uninstall:
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rm -f "$(DESTDIR)$(libdir)/ivl$(suffix)/pcb.tgt"
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rm -f "$(DESTDIR)$(libdir)/ivl$(suffix)/pcb.conf"
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rm -f "$(DESTDIR)$(libdir)/ivl$(suffix)/pcb-s.conf"
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-include $(patsubst %.o, dep/%.d, $O)
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@ -0,0 +1,91 @@
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/*
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* Copyright (c) 2011 Stephen Williams (steve@icarus.com)
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*
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* This source code is free software; you can redistribute it
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* and/or modify it in source code form under the terms of the GNU
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* General Public License as published by the Free Software
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* Foundation; either version 2 of the License, or (at your option)
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* any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
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*/
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/*
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* This is a PCB target module.
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*/
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# include "version_base.h"
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# include "version_tag.h"
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# include "pcb_config.h"
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# include <string.h>
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# include <stdio.h>
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# include "pcb_priv.h"
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# include "ivl_target.h"
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static const char*version_string =
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"Icarus Verilog PCB Netlist Generator " VERSION " (" VERSION_TAG ")\n\n"
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"Copyright (c) 2011 Stephen Williams (steve@icarus.com)\n\n"
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" This program is free software; you can redistribute it and/or modify\n"
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" it under the terms of the GNU General Public License as published by\n"
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" the Free Software Foundation; either version 2 of the License, or\n"
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" (at your option) any later version.\n"
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"\n"
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" This program is distributed in the hope that it will be useful,\n"
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" but WITHOUT ANY WARRANTY; without even the implied warranty of\n"
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" MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the\n"
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" GNU General Public License for more details.\n"
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"\n"
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" You should have received a copy of the GNU General Public License along\n"
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" with this program; if not, write to the Free Software Foundation, Inc.,\n"
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" 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.\n"
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;
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int target_design(ivl_design_t des)
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{
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ivl_scope_t*root_scopes;
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unsigned nroot;
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unsigned idx;
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FILE*fnet;
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int rc = 0;
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const char*path = ivl_design_flag(des, "-o");
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if (path == 0) {
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return -1;
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}
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fnet = fopen(path, "w");
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if (fnet == 0) {
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perror (path);
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return -2;
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}
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ivl_design_roots(des, &root_scopes, &nroot);
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for (idx = 0 ; idx < nroot ; idx += 1) {
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int tmp = scan_scope(root_scopes[idx]);
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if (tmp != 0) {
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rc = tmp;
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break;
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}
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}
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show_netlist(fnet);
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fclose(fnet);
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return rc;
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}
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const char* target_query(const char*key)
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{
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if (strcmp(key,"version") == 0)
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return version_string;
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return 0;
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}
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@ -0,0 +1,3 @@
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functor:cprop
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functor:nodangle
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flag:DLL=pcb.tgt
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@ -0,0 +1,28 @@
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#ifndef __pcb_config_H
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#define __pcb_config_H
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/*
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* Copyright (c) 2011 Stephen Williams (steve@icarus.com)
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*
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* This source code is free software; you can redistribute it
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* and/or modify it in source code form under the terms of the GNU
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* General Public License as published by the Free Software
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* Foundation; either version 2 of the License, or (at your option)
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* any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
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*/
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# undef HAVE_STDINT_H
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# undef HAVE_INTTYPES_H
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# undef _LARGEFILE_SOURCE
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# undef _LARGEFILE64_SOURCE
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#endif /* __pcb_config_H */
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@ -0,0 +1,39 @@
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#ifndef __pcb_priv_H
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#define __pcb_priv_H
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/*
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* Copyright (c) 2011 Stephen Williams (steve@icarus.com)
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*
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* This source code is free software; you can redistribute it
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* and/or modify it in source code form under the terms of the GNU
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* General Public License as published by the Free Software
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* Foundation; either version 2 of the License, or (at your option)
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* any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
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*/
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# include <string>
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# include <set>
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# include <list>
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# include <cstdio>
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# include <ivl_target.h>
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extern int scan_scope(ivl_scope_t scope);
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struct nexus_data {
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std::string name;
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std::set<std::string> pins;
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};
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extern std::list<struct nexus_data*> nexus_list;
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extern void show_netlist(FILE*fnet);
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#endif
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@ -0,0 +1,121 @@
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/*
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* Copyright (c) 2011 Stephen Williams (steve@icarus.com)
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*
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* This source code is free software; you can redistribute it
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* and/or modify it in source code form under the terms of the GNU
|
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* General Public License as published by the Free Software
|
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* Foundation; either version 2 of the License, or (at your option)
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* any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
|
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
|
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* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
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*/
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# include "pcb_priv.h"
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# include <cstring>
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# include <cassert>
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using namespace std;
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list<struct nexus_data*> nexus_list;
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static void sheet_box(ivl_scope_t scope);
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static void black_box(ivl_scope_t scope);
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static string wire_name(ivl_signal_t sig);
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int scan_scope(ivl_scope_t scope)
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{
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int black_box_flag = 0;
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int idx;
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// Scan the attributes, looking in particular for the
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// black_box attribute.
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for (idx = 0 ; idx < ivl_scope_attr_cnt(scope) ; idx += 1) {
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ivl_attribute_t attr = ivl_scope_attr_val(scope, idx);
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if (strcmp(attr->key, "ivl_black_box") == 0)
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black_box_flag = 1;
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}
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// If this scope is a black box, then process it
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// so. Otherwise, process it as a sheet, which will recurse.
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if (black_box_flag) {
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black_box(scope);
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} else {
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sheet_box(scope);
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}
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return 0;
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}
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static int child_scan_fun(ivl_scope_t scope, void*)
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{
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int rc = scan_scope(scope);
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return 0;
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}
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void sheet_box(ivl_scope_t scope)
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{
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printf("Sheet %s...\n", ivl_scope_name(scope));
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unsigned sigs = ivl_scope_sigs(scope);
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for (unsigned idx = 0 ; idx < sigs ; idx += 1) {
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ivl_signal_t sig = ivl_scope_sig(scope, idx);
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printf(" Wire %s\n", ivl_signal_basename(sig));
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assert(ivl_signal_array_count(sig) == 1);
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ivl_nexus_t nex = ivl_signal_nex(sig, 0);
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struct nexus_data*nex_data = reinterpret_cast<nexus_data*>
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(ivl_nexus_get_private(nex));
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if (nex_data == 0) {
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nex_data = new nexus_data;
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nex_data->name = wire_name(sig);
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nexus_list.push_back(nex_data);
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ivl_nexus_set_private(nex, nex_data);
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}
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}
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ivl_scope_children(scope, child_scan_fun, 0);
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}
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/*
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* A black box is a component. Do not process the contents, other then
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* to get at the ports that we'll attach to the netlist.
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*/
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static void black_box(ivl_scope_t scope)
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{
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assert(ivl_scope_type(scope) == IVL_SCT_MODULE);
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printf(" Component %s is %s\n", ivl_scope_name(scope), ivl_scope_tname(scope));
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unsigned sigs = ivl_scope_sigs(scope);
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for (unsigned idx = 0 ; idx < sigs ; idx += 1) {
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ivl_signal_t sig = ivl_scope_sig(scope, idx);
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ivl_signal_port_t sip = ivl_signal_port(sig);
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// Skip signals that are not ports.
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if (sip == IVL_SIP_NONE)
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continue;
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assert(ivl_signal_array_count(sig) == 1);
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ivl_nexus_t nex = ivl_signal_nex(sig, 0);
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struct nexus_data*nex_data = reinterpret_cast<struct nexus_data*>(ivl_nexus_get_private(nex));
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assert(nex_data);
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string refdes = ivl_scope_basename(scope);
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string pindes = ivl_signal_basename(sig);
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string pin = refdes + "-" + pindes;
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nex_data->pins.insert(pin);
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printf(" port %s\n", ivl_signal_basename(sig));
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}
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}
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static string wire_name(ivl_signal_t sig)
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{
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string res = ivl_signal_basename(sig);
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return res;
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}
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@ -0,0 +1,37 @@
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/*
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* Copyright (c) 2011 Stephen Williams (steve@icarus.com)
|
||||
*
|
||||
* This source code is free software; you can redistribute it
|
||||
* and/or modify it in source code form under the terms of the GNU
|
||||
* General Public License as published by the Free Software
|
||||
* Foundation; either version 2 of the License, or (at your option)
|
||||
* any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
|
||||
*/
|
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|
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# include "pcb_priv.h"
|
||||
|
||||
using namespace std;
|
||||
|
||||
void show_netlist(FILE*fnet)
|
||||
{
|
||||
for (list<nexus_data*>::iterator cur = nexus_list.begin()
|
||||
; cur != nexus_list.end() ; ++ cur) {
|
||||
|
||||
nexus_data*curp = *cur;
|
||||
fprintf(fnet, "%s", curp->name.c_str());
|
||||
for (set<string>::const_iterator cp = curp->pins.begin()
|
||||
; cp != curp->pins.end() ; ++ cp) {
|
||||
fprintf(fnet, " %s", cp->c_str());
|
||||
}
|
||||
fprintf(fnet, "\n");
|
||||
}
|
||||
}
|
||||
Loading…
Reference in New Issue