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Remove most references to ivl_variable_type_t from the parser 

The parser used to have behavior that was dependent on the
`ivl_variable_type_t` of a signal. It also used the `ivl_variable_type_t`
of a signal to decide whether a signal can be re-declared as part of a
non-ANSI port declaration.

Neither of these is done anymore and most of the reference to
`ivl_variable_type_t` can be removed from the parser. The only thing it is
still needed for is to decide whether a vector type is 4-state or 2-state.

Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
This commit is contained in:
Lars-Peter Clausen 2022-04-23 12:22:21 +02:00
parent b307da0831
commit 8f78590bd2
6 changed files with 21 additions and 104 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

5
PWire.cc
View File

@ -125,11 +125,6 @@ bool PWire::set_data_type(ivl_variable_type_t dt)
return true;
}
ivl_variable_type_t PWire::get_data_type() const
{
return data_type_;
}
void PWire::set_signed(bool flag)
{
// For a non-ANSI style port declaration where the data type is

1
PWire.h
View File

@ -73,7 +73,6 @@ class PWire : public PNamedItem {
bool get_signed() const;
bool set_data_type(ivl_variable_type_t dt);
ivl_variable_type_t get_data_type() const;
void set_range(const std::list<pform_range_t>&ranges, PWSRType type);

2
parse.y
View File

@ -5784,7 +5784,7 @@ dimensions
net_variable
: IDENTIFIER dimensions_opt
{ perm_string name = lex_strings.make($1);
$$ = pform_makewire(@1, name, NetNet::IMPLICIT, IVL_VT_NO_TYPE, $2);
$$ = pform_makewire(@1, name, NetNet::IMPLICIT, $2);
delete [] $1;
}
;

114
pform.cc
View File

@ -2156,6 +2156,7 @@ static void pform_set_net_range(PWire *wire,
if (range)
wire->set_range(*range, rt);
wire->set_signed(vec_type->signed_flag);
wire->set_data_type(vec_type->base_type);
}
/*
@ -2535,7 +2536,7 @@ void pform_make_var_init(const struct vlltype&li,
static PWire* pform_get_or_make_wire(const struct vlltype&li, perm_string name,
NetNet::Type type, NetNet::PortType ptype,
ivl_variable_type_t dtype, PWSRType rt)
PWSRType rt)
{
PWire *cur = 0;
@ -2566,7 +2567,7 @@ static PWire* pform_get_or_make_wire(const struct vlltype&li, perm_string name,
// to the scope. Do not delete the old wire - it will
// remain in the local symbol map.
cur = new PWire(name, type, ptype, dtype, rt);
cur = new PWire(name, type, ptype, IVL_VT_NO_TYPE, rt);
FILE_NAME(cur, li);
pform_put_wire_in_scope(name, cur);
@ -2593,8 +2594,6 @@ void pform_module_define_port(const struct vlltype&li,
list<named_pexpr_t>*attr,
bool keep_attr)
{
ivl_variable_type_t data_type = IVL_VT_NO_TYPE;
pform_check_net_data_type(li, type, vtype);
// Unpacked dimensions
@ -2607,32 +2606,12 @@ void pform_module_define_port(const struct vlltype&li,
vtype = uarr_type->base_type;
}
PWire *cur = pform_get_or_make_wire(li, name, type, port_kind, SR_BOTH);
vector_type_t*vec_type = dynamic_cast<vector_type_t*> (vtype);
if (vec_type) {
data_type = vec_type->base_type;
vtype = 0;
} else if (dynamic_cast<real_type_t*>(vtype)) {
data_type = IVL_VT_REAL;
} else if (vtype) {
if (vtype->figure_packed_base_type() != IVL_VT_NO_TYPE) {
data_type = vtype->figure_packed_base_type();
} else {
VLerror(li, "sorry: Given type %s not supported here (%s:%d).",
typeid(*vtype).name(), __FILE__, __LINE__);
}
}
// The default type for all flavor of ports is LOGIC.
if (data_type == IVL_VT_NO_TYPE)
data_type = IVL_VT_LOGIC;
PWire *cur = pform_get_or_make_wire(li, name, type, port_kind, data_type,
SR_BOTH);
pform_set_net_range(cur, vec_type, SR_BOTH);
if (vtype)
if (vec_type)
pform_set_net_range(cur, vec_type, SR_BOTH);
else if (vtype)
cur->set_data_type(vtype);
if (urange) {
@ -2676,29 +2655,12 @@ void pform_module_define_port(const struct vlltype&li,
* this one to create the wire and stash it.
*/
PWire *pform_makewire(const vlltype&li, perm_string name, NetNet::Type type,
ivl_variable_type_t dt, std::list<pform_range_t> *indices)
std::list<pform_range_t> *indices)
{
PWire*cur = pform_get_or_make_wire(li, name, type, NetNet::NOT_A_PORT,
dt, SR_NET);
SR_NET);
assert(cur);
bool flag;
switch (dt) {
case IVL_VT_REAL:
flag = cur->set_data_type(dt);
if (flag == false) {
cerr << cur->get_fileline() << ": internal error: "
<< " wire data type handling mismatch. Cannot change "
<< cur->get_data_type()
<< " to " << dt << "." << endl;
}
ivl_assert(*cur, flag);
cur->set_signed(true);
break;
default:
break;
}
if (indices && !indices->empty())
cur->set_unpacked_idx(*indices);
@ -2723,8 +2685,7 @@ void pform_makewire(const struct vlltype&li,
for (list<decl_assignment_t*>::iterator cur = assign_list->begin()
; cur != assign_list->end() ; ++ cur) {
decl_assignment_t* curp = *cur;
PWire *wire = pform_makewire(li, curp->name, type, IVL_VT_NO_TYPE,
&curp->index);
PWire *wire = pform_makewire(li, curp->name, type, &curp->index);
wires->push_back(wire);
}
@ -2808,7 +2769,7 @@ static vector<pform_tf_port_t>*pform_make_task_ports_vec(const struct vlltype&lo
/* Look for a preexisting wire. If it exists, set the
port direction. If not, create it. */
PWire*curw = pform_get_or_make_wire(loc, name, NetNet::IMPLICIT_REG,
pt, vec_type->base_type, rt);
pt, rt);
pform_set_net_range(curw, vec_type, rt);
if (cur->udims) {
@ -2824,7 +2785,6 @@ static vector<pform_tf_port_t>*pform_make_task_ports_vec(const struct vlltype&lo
static vector<pform_tf_port_t>*do_make_task_ports(const struct vlltype&loc,
NetNet::PortType pt,
ivl_variable_type_t vtype,
data_type_t*data_type,
list<pform_port_t>*ports)
{
@ -2838,7 +2798,8 @@ static vector<pform_tf_port_t>*do_make_task_ports(const struct vlltype&loc,
perm_string &name = cur->name;
PWire*curw = pform_get_or_make_wire(loc, name, NetNet::IMPLICIT_REG,
pt, vtype, rt);
pt, rt);
if (data_type)
curw->set_data_type(data_type);
@ -2866,30 +2827,11 @@ vector<pform_tf_port_t>*pform_make_task_ports(const struct vlltype&loc,
vtype = uarray->base_type;
}
if (dynamic_cast<atom_type_t*> (vtype)) {
ret = do_make_task_ports(loc, pt, vtype->figure_packed_base_type(),
vtype, ports);
}
if (vector_type_t*vec_type = dynamic_cast<vector_type_t*> (vtype)) {
ret = pform_make_task_ports_vec(loc, pt, vec_type, ports,
allow_implicit);
}
if (/*real_type_t*real_type = */ dynamic_cast<real_type_t*> (vtype)) {
ret = do_make_task_ports(loc, pt, IVL_VT_REAL, vtype, ports);
}
if (dynamic_cast<string_type_t*> (vtype)) {
ret = do_make_task_ports(loc, pt, IVL_VT_STRING, vtype, ports);
}
if (class_type_t*class_type = dynamic_cast<class_type_t*> (vtype)) {
ret = do_make_task_ports(loc, pt, IVL_VT_CLASS, class_type, ports);
}
if (! ret) {
ret = do_make_task_ports(loc, pt, IVL_VT_NO_TYPE, vtype, ports);
} else {
ret = do_make_task_ports(loc, pt, vtype, ports);
}
if (unpacked_dims) {
@ -3227,8 +3169,9 @@ void pform_set_port_type(const struct vlltype&li,
for (list<pform_port_t>::iterator cur = ports->begin()
; cur != ports->end() ; ++ cur ) {
PWire *wire = pform_get_or_make_wire(li, cur->name, NetNet::IMPLICIT, pt,
IVL_VT_NO_TYPE, SR_PORT);
PWire *wire = pform_get_or_make_wire(li, cur->name,
NetNet::IMPLICIT, pt,
SR_PORT);
pform_set_net_range(wire, vt, SR_PORT, attr);
if (cur->udims) {
@ -3265,7 +3208,6 @@ void pform_set_data_type(const struct vlltype&li, data_type_t*data_type,
std::vector<PWire*> *wires, NetNet::Type net_type,
list<named_pexpr_t>*attr)
{
ivl_variable_type_t vt;
if (data_type == 0) {
VLerror(li, "internal error: data_type==0.");
assert(0);
@ -3276,22 +3218,6 @@ void pform_set_data_type(const struct vlltype&li, data_type_t*data_type,
data_type = uarray_type->base_type;
vector_type_t*vec_type = dynamic_cast<vector_type_t*> (data_type);
if (vec_type) {
vt = vec_type->base_type;
}
else if (/*real_type_t*real_type =*/ dynamic_cast<real_type_t*> (data_type)) {
vt = IVL_VT_REAL;
}
else if (dynamic_cast<class_type_t*> (data_type)) {
vt = IVL_VT_CLASS;
}
else if (dynamic_cast<string_type_t*> (data_type)) {
vt = IVL_VT_STRING;
} else {
vt = data_type->figure_packed_base_type();
}
for (std::vector<PWire*>::iterator it= wires->begin();
it != wires->end() ; ++it) {
@ -3303,8 +3229,6 @@ void pform_set_data_type(const struct vlltype&li, data_type_t*data_type,
// is only ever called on a fresh wire that already exists.
bool rc = wire->set_wire_type(net_type);
ivl_assert(li, rc);
rc = wire->set_data_type(vt);
ivl_assert(li, rc);
if (uarray_type) {
wire->set_unpacked_idx(*uarray_type->dims.get());

1
pform.h
View File

@ -330,7 +330,6 @@ extern PForeach* pform_make_foreach(const struct vlltype&loc,
*/
extern PWire *pform_makewire(const struct vlltype&li, perm_string name,
NetNet::Type type,
ivl_variable_type_t dt,
std::list<pform_range_t> *indices);
/* This form handles assignment declarations. */

2
pform_disciplines.cc
View File

@ -195,7 +195,7 @@ void pform_attach_discipline(const struct vlltype&loc,
PWire* cur_net = pform_get_wire_in_scope(*cur);
if (cur_net == 0) {
/* Not declared yet, declare it now. */
cur_net = pform_makewire(loc, *cur, NetNet::WIRE, IVL_VT_REAL, 0);
cur_net = pform_makewire(loc, *cur, NetNet::WIRE, 0);
assert(cur_net);
}