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Unify elaboration of l-values for all proceedural assignments,
including assing, cassign and force. Generate NetConcat devices for gate outputs that feed into a vector results. Use this to hande gate arrays. Also let gate arrays handle vectors of gates when the outputs allow for it.
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@@ -17,7 +17,7 @@
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* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
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*/
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#ifdef HAVE_CVS_IDENT
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#ident "$Id: target.cc,v 1.70 2004/12/11 02:31:28 steve Exp $"
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#ident "$Id: target.cc,v 1.71 2004/12/29 23:55:43 steve Exp $"
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#endif
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# include "config.h"
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@@ -137,6 +137,13 @@ void target_t::lpm_ram_dq(const NetRamDq*)
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"Unhandled NetRamDq." << endl;
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}
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bool target_t::concat(const NetConcat*)
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{
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cerr << "target (" << typeid(*this).name() << "): "
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"Unhandled NetConcat." << endl;
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return false;
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}
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bool target_t::part_select(const NetPartSelect*)
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{
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cerr << "target (" << typeid(*this).name() << "): "
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@@ -412,6 +419,14 @@ void expr_scan_t::expr_binary(const NetEBinary*ex)
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/*
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* $Log: target.cc,v $
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* Revision 1.71 2004/12/29 23:55:43 steve
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* Unify elaboration of l-values for all proceedural assignments,
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* including assing, cassign and force.
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*
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* Generate NetConcat devices for gate outputs that feed into a
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* vector results. Use this to hande gate arrays. Also let gate
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* arrays handle vectors of gates when the outputs allow for it.
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*
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* Revision 1.70 2004/12/11 02:31:28 steve
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* Rework of internals to carry vectors through nexus instead
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* of single bits. Make the ivl, tgt-vvp and vvp initial changes
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