Honor declaration order for wildcard port connections
IEEE 1800-2023 section 23.3.2.4 defines a `.*` connection as equivalent
to an implicit `.name` connection for every port not connected explicitly.
The existing `.name` path resolves the matching identifier at the
connection's lexical position. Wildcard port matching instead searches at
the end of the scope, making it find declarations after the connection:
child i_child(.*);
wire value;
Use the lexical position carried by the wildcard binding when looking up
and creating wildcard connections. The position of `.*` itself matters
because an earlier explicit port connection can create an implicit net
that the wildcard connection should see:
child i_child(.source(value), .*);
This also preserves the relaxed lookup provided by
`-gno-strict-net-var-declaration`.
Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
This commit is contained in:
parent
5f479cbad4
commit
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11
elaborate.cc
11
elaborate.cc
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@ -1263,19 +1263,22 @@ bool PGModule::match_module_ports_(Design*des, const Module*rmod,
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for (unsigned idx = 0 ; idx < npins_ ; idx += 1) {
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// Handle wildcard named port.
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if (pins_[idx].name[0] == '*') {
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const auto &wildcard = pins_[idx];
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for (unsigned j = 0 ; j < nexp ; j += 1) {
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if (rmod->ports[j] && !pins[j] && !pins_is_explicitly_not_connected[j]) {
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pins_fromwc[j] = true;
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pform_name_t path_;
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path_.push_back(name_component_t(rmod->ports[j]->name));
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symbol_search_results sr;
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symbol_search(this, des, scope, path_, UINT_MAX, &sr);
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symbol_search(&wildcard, des, scope, path_,
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wildcard.lexical_pos(), &sr);
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if (sr.net != 0 ||
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(rmod->ports[j]->is_interface_port() &&
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sr.scope != 0 && sr.scope->is_interface())) {
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pins[j] = new PEIdent(rmod->ports[j]->name, UINT_MAX, true);
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pins[j]->set_lineno(get_lineno());
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pins[j]->set_file(get_file());
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pins[j] = new PEIdent(
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rmod->ports[j]->name,
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wildcard.lexical_pos(), true);
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pins[j]->set_line(wildcard);
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}
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}
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}
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