Drop useless CVS stuff in .txt files
Remove useless, redundant, misleading, and misspelled $Id$ and $Log$ cruft from all .txt files.
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@ -2,7 +2,6 @@
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CADENCE PLI1 MODULES
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CADENCE PLI1 MODULES
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Copyright 2003 Stephen Williams
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Copyright 2003 Stephen Williams
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$Id: cadpli.txt,v 1.2 2003/02/17 00:01:25 steve Exp $
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With the cadpli module, Icarus Verilog is able to load PLI1
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With the cadpli module, Icarus Verilog is able to load PLI1
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applications that were compiled and linked to be dynamic loaded by
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applications that were compiled and linked to be dynamic loaded by
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@ -34,15 +33,3 @@ the +loadpli1= argument to Verilog-XL.
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The integration from this point is seamless. The PLI application
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The integration from this point is seamless. The PLI application
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hardly knows that it is being invoked by Icarus Verilog instead of
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hardly knows that it is being invoked by Icarus Verilog instead of
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Verilog-XL, so operates as it would otherwise.
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Verilog-XL, so operates as it would otherwise.
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$Log: cadpli.txt,v $
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Revision 1.2 2003/02/17 00:01:25 steve
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Use a variant of ivl_dlfcn to do dynamic loading
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from within the cadpli module.
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Change the +cadpli flag to -cadpli, to keep the
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plusargs namespace clear.
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Revision 1.1 2003/02/16 02:44:47 steve
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Add the cadpli HOWTO.
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@ -499,65 +499,3 @@ already seems to exist amongst VCD viewers in the wild, this behavior
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seems to be acceptable according to the standard, is a better mirror
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seems to be acceptable according to the standard, is a better mirror
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of 4-value behavior in the dead zone, and appears more user friendly
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of 4-value behavior in the dead zone, and appears more user friendly
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when viewed by reasonable viewers.
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when viewed by reasonable viewers.
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$Id: ieee1364-notes.txt,v 1.19 2007/04/18 02:36:13 steve Exp $
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$Log: ieee1364-notes.txt,v $
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Revision 1.19 2007/04/18 02:36:13 steve
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Put to iverilog wiki for further notes.
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Revision 1.18 2007/03/22 16:08:16 steve
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Spelling fixes from Larry
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Revision 1.17 2003/07/15 03:49:22 steve
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Spelling fixes.
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Revision 1.16 2003/04/14 03:40:21 steve
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Make some effort to preserve bits while
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operating on constant values.
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Revision 1.15 2003/02/16 23:39:08 steve
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NaN in dead zones of VCD dumps.
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Revision 1.14 2003/02/06 17:51:36 steve
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Edge of vectors notes.
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Revision 1.13 2002/08/20 04:11:53 steve
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Support parameters with defined ranges.
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Revision 1.12 2002/06/11 03:34:33 steve
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Spelling patch (Larry Doolittle)
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Revision 1.11 2002/04/27 02:38:04 steve
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Support selecting bits from parameters.
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Revision 1.10 2002/03/31 01:54:13 steve
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Notes about scheduling
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Revision 1.9 2002/01/26 02:08:07 steve
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Handle x in l-value of set/x
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Revision 1.8 2001/08/01 05:17:31 steve
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Accept empty port lists to module instantiation.
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Revision 1.7 2001/02/17 05:27:31 steve
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I allow function ports to have types.
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Revision 1.6 2001/02/12 16:48:04 steve
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Rant about bit widths.
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Revision 1.5 2001/01/02 17:28:08 steve
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Resolve repeat ambiguity in favor of loop.
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Revision 1.4 2001/01/01 19:12:35 steve
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repeat loops ambiguity.
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Revision 1.3 2000/12/15 00:21:46 steve
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rounding of time and x in primitives.
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Revision 1.2 2000/11/19 22:03:04 steve
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Integer parameter comments.
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Revision 1.1 2000/07/23 18:06:31 steve
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Document ieee1364 issues.
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@ -2,7 +2,6 @@
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Icarus Verilog LOADABLE TARGET API (ivl_target)
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Icarus Verilog LOADABLE TARGET API (ivl_target)
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Copyright 2002 Stephen Williams <steve@icarus.com>
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Copyright 2002 Stephen Williams <steve@icarus.com>
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$Id: ivl_target.txt,v 1.3 2002/06/11 03:34:33 steve Exp $
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The ivl_target API is the interface available to modules that the
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The ivl_target API is the interface available to modules that the
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@ -38,14 +37,3 @@ other LPM device with outputs.
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There are ivl_lpm_size() input ports, each with the width
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There are ivl_lpm_size() input ports, each with the width
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ivl_lpm_data2_width(). The actual nexus is indexed by ivl_lpm_data2().
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ivl_lpm_data2_width(). The actual nexus is indexed by ivl_lpm_data2().
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$Log: ivl_target.txt,v $
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Revision 1.3 2002/06/11 03:34:33 steve
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Spelling patch (Larry Doolittle)
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Revision 1.2 2002/03/17 19:31:17 steve
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Add API to support user defined function.
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Revision 1.1 2002/03/09 02:10:22 steve
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Add the NetUserFunc netlist node.
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47
netlist.txt
47
netlist.txt
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@ -16,7 +16,6 @@
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* along with this program; if not, write to the Free Software
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
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* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
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*/
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*/
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#ident "$Id: netlist.txt,v 1.10 2000/07/23 18:06:15 steve Exp $"
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Note that the netlist.h header contains detailed descriptions of how
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Note that the netlist.h header contains detailed descriptions of how
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@ -291,49 +290,3 @@ values. These are filled in during scope elaboration and are used in
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subsequent elaboration phases to arrange for scaling of delays. This
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subsequent elaboration phases to arrange for scaling of delays. This
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information can also be used by the code generator to scale times back
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information can also be used by the code generator to scale times back
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to the units of the scope, if that is desired.
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to the units of the scope, if that is desired.
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$Log: netlist.txt,v $
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Revision 1.10 2000/07/23 18:06:15 steve
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Document time scale in netlists.
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Revision 1.9 2000/07/14 06:12:57 steve
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Move inital value handling from NetNet to Nexus
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objects. This allows better propogation of inital
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values.
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Clean up constant propagation a bit to account
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for regs that are not really values.
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Revision 1.8 2000/03/08 04:36:54 steve
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Redesign the implementation of scopes and parameters.
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I now generate the scopes and notice the parameters
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in a separate pass over the pform. Once the scopes
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are generated, I can process overrides and evalutate
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paremeters before elaboration begins.
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Revision 1.7 1999/11/28 23:42:02 steve
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NetESignal object no longer need to be NetNode
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objects. Let them keep a pointer to NetNet objects.
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Revision 1.6 1999/11/21 00:13:09 steve
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Support memories in continuous assignments.
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Revision 1.5 1999/11/02 04:55:34 steve
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Add the synthesize method to NetExpr to handle
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synthesis of expressions, and use that method
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to improve r-value handling of LPM_FF synthesis.
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Modify the XNF target to handle LPM_FF objects.
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Revision 1.4 1999/09/29 00:03:27 steve
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Spelling fixes from Larry.
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Revision 1.3 1999/07/24 02:11:20 steve
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Elaborate task input ports.
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Revision 1.2 1999/07/21 01:15:29 steve
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Document netlist semantics.
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Revision 1.1 1999/05/27 04:13:08 steve
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Handle expression bit widths with non-fatal errors.
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@ -1,5 +1,3 @@
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# $Id: README-solaris_pkg.txt,v 1.3 2007/02/26 19:49:49 steve Exp $
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Notes about the solaris package.
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Notes about the solaris package.
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I. Installing a prebuilt solaris package
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I. Installing a prebuilt solaris package
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@ -2,7 +2,6 @@
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FPGA LOADABLE CODE GENERATOR FOR Icarus Verilog
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FPGA LOADABLE CODE GENERATOR FOR Icarus Verilog
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Copyright 2001 Stephen Williams
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Copyright 2001 Stephen Williams
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$Id: fpga.txt,v 1.12 2005/09/19 21:45:36 steve Exp $
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The FPGA code generator supports a variety of FPGA devices, writing
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The FPGA code generator supports a variety of FPGA devices, writing
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XNF or EDIF depending on the target. You can select the architecture
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XNF or EDIF depending on the target. You can select the architecture
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@ -186,42 +185,3 @@ Compile a single-file design with command line tools like so:
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% map -o map.ncd foo.ngd
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% map -o map.ncd foo.ngd
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% par -w map.ncd foo.ncd
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% par -w map.ncd foo.ncd
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---
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$Log: fpga.txt,v $
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Revision 1.12 2005/09/19 21:45:36 steve
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Spelling patches from Larry.
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Revision 1.11 2003/08/07 05:17:34 steve
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Add arch=lpm to the documentation.
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Revision 1.10 2003/07/04 03:57:19 steve
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Allow attributes on Verilog 2001 port declarations.
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Revision 1.9 2003/07/04 01:08:03 steve
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PAD attribute can be used to assign pins.
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Revision 1.8 2003/07/02 00:26:49 steve
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Fix spelling of part= flag.
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Revision 1.7 2003/03/24 02:28:38 steve
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Document the virtex2 architecture.
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Revision 1.6 2003/03/24 00:47:54 steve
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Add new virtex2 architecture family, and
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also the new edif.h EDIF management functions.
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Revision 1.5 2002/04/30 04:26:42 steve
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Spelling errors.
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Revision 1.4 2001/09/16 22:26:47 steve
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Support the cellref attribute.
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Revision 1.3 2001/09/16 01:48:16 steve
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Suppor the PAD attribute on signals.
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Revision 1.2 2001/09/06 04:28:40 steve
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Separate the virtex and generic-edif code generators.
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Revision 1.1 2001/09/02 23:58:49 steve
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Add documentation for the code generator.
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@ -1,7 +1,6 @@
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/*
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/*
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* Copyright (c) 2001 Stephen Williams (steve@icarus.com)
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* Copyright (c) 2001 Stephen Williams (steve@icarus.com)
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*
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*
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* $Id: README.txt,v 1.82 2007/03/22 16:08:19 steve Exp $
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*/
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*/
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VVP SIMULATION ENGINE
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VVP SIMULATION ENGINE
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/*
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/*
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* Copyright (c) 2001 Stephen Williams (steve@icarus.com)
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* Copyright (c) 2001 Stephen Williams (steve@icarus.com)
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*
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*
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* $Id: vpi.txt,v 1.8 2007/03/22 16:08:19 steve Exp $
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*/
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*/
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/*
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/*
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* Copyright (c) 2001 Stephen Williams (steve@icarus.com)
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* Copyright (c) 2001 Stephen Williams (steve@icarus.com)
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*
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*
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* $Id: vthread.txt,v 1.6 2005/09/19 21:45:37 steve Exp $
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*/
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*/
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