tgt-vvp: Support assignment operators on object properties
Currently assignment operators on object properties are silently ignored. Make sure that they are handled. To enable this refactor the code a bit so that the assignment operator handling can be shared between object property assignments and scalar value assignments. Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
This commit is contained in:
Lars-Peter Clausen
parent
d0327c5eda
commit
867c7d18b4
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@ -541,13 +541,77 @@ static unsigned int draw_array_pattern(ivl_signal_t var, ivl_expr_t rval,
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return array_idx;
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}
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static void draw_stmt_assign_vector_opcode(unsigned char opcode, bool is_signed)
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{
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int idx_reg;
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switch (opcode) {
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case 0:
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break;
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case '+':
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fprintf(vvp_out, " %%add;\n");
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break;
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case '-':
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fprintf(vvp_out, " %%sub;\n");
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break;
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case '*':
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fprintf(vvp_out, " %%mul;\n");
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break;
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case '/':
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fprintf(vvp_out, " %%div%s;\n", is_signed ? "/s":"");
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break;
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case '%':
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fprintf(vvp_out, " %%mod%s;\n", is_signed ? "/s":"");
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break;
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case '&':
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fprintf(vvp_out, " %%and;\n");
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break;
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case '|':
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fprintf(vvp_out, " %%or;\n");
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break;
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case '^':
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fprintf(vvp_out, " %%xor;\n");
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break;
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case 'l': /* lval <<= expr */
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idx_reg = allocate_word();
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fprintf(vvp_out, " %%ix/vec4 %d;\n", idx_reg);
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fprintf(vvp_out, " %%shiftl %d;\n", idx_reg);
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clr_word(idx_reg);
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break;
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case 'r': /* lval >>= expr */
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idx_reg = allocate_word();
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fprintf(vvp_out, " %%ix/vec4 %d;\n", idx_reg);
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fprintf(vvp_out, " %%shiftr %d;\n", idx_reg);
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clr_word(idx_reg);
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break;
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case 'R': /* lval >>>= expr */
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idx_reg = allocate_word();
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fprintf(vvp_out, " %%ix/vec4 %d;\n", idx_reg);
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fprintf(vvp_out, " %%shiftr/s %d;\n", idx_reg);
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clr_word(idx_reg);
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break;
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default:
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fprintf(vvp_out, "; UNSUPPORTED ASSIGNMENT OPCODE: %c\n", opcode);
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assert(0);
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break;
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}
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}
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static int show_stmt_assign_vector(ivl_statement_t net)
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{
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ivl_expr_t rval = ivl_stmt_rval(net);
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//struct vector_info res;
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//struct vector_info lres = {0, 0};
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struct vec_slice_info*slices = 0;
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int idx_reg;
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if (ivl_expr_type(rval) == IVL_EX_ARRAY_PATTERN) {
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ivl_lval_t lval = ivl_stmt_lval(net, 0);
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@ -556,96 +620,30 @@ static int show_stmt_assign_vector(ivl_statement_t net)
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return 0;
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}
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unsigned wid = ivl_stmt_lwidth(net);
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/* If this is a compressed assignment, then get the contents
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of the l-value. We need these values as part of the r-value
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calculation. */
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if (ivl_stmt_opcode(net) != 0) {
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struct vec_slice_info *slices;
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slices = calloc(ivl_stmt_lvals(net), sizeof(struct vec_slice_info));
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fprintf(vvp_out, " ; show_stmt_assign_vector: Get l-value for compressed %c= operand\n", ivl_stmt_opcode(net));
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slices = calloc(ivl_stmt_lvals(net), sizeof(struct vec_slice_info));
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get_vec_from_lval(net, slices);
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}
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unsigned wid = ivl_stmt_lwidth(net);
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draw_eval_vec4(rval);
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resize_vec4_wid(rval, wid);
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switch (ivl_stmt_opcode(net)) {
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case 0:
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draw_eval_vec4(rval);
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resize_vec4_wid(rval, wid);
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draw_stmt_assign_vector_opcode(ivl_stmt_opcode(net),
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ivl_expr_signed(rval));
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put_vec_to_lval(net, slices);
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free(slices);
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} else {
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draw_eval_vec4(rval);
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resize_vec4_wid(rval, wid);
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store_vec4_to_lval(net);
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break;
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case '+':
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fprintf(vvp_out, " %%add;\n");
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put_vec_to_lval(net, slices);
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break;
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case '-':
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fprintf(vvp_out, " %%sub;\n");
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put_vec_to_lval(net, slices);
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break;
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case '*':
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fprintf(vvp_out, " %%mul;\n");
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put_vec_to_lval(net, slices);
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break;
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case '/':
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fprintf(vvp_out, " %%div%s;\n", ivl_expr_signed(rval)? "/s":"");
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put_vec_to_lval(net, slices);
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break;
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case '%':
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fprintf(vvp_out, " %%mod%s;\n", ivl_expr_signed(rval)? "/s":"");
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put_vec_to_lval(net, slices);
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break;
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case '&':
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fprintf(vvp_out, " %%and;\n");
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put_vec_to_lval(net, slices);
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break;
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case '|':
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fprintf(vvp_out, " %%or;\n");
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put_vec_to_lval(net, slices);
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break;
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case '^':
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fprintf(vvp_out, " %%xor;\n");
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put_vec_to_lval(net, slices);
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break;
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case 'l': /* lval <<= expr */
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idx_reg = allocate_word();
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fprintf(vvp_out, " %%ix/vec4 %d;\n", idx_reg);
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fprintf(vvp_out, " %%shiftl %d;\n", idx_reg);
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clr_word(idx_reg);
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put_vec_to_lval(net, slices);
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break;
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case 'r': /* lval >>= expr */
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idx_reg = allocate_word();
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fprintf(vvp_out, " %%ix/vec4 %d;\n", idx_reg);
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fprintf(vvp_out, " %%shiftr %d;\n", idx_reg);
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clr_word(idx_reg);
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put_vec_to_lval(net, slices);
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break;
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case 'R': /* lval >>>= expr */
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idx_reg = allocate_word();
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fprintf(vvp_out, " %%ix/vec4 %d;\n", idx_reg);
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fprintf(vvp_out, " %%shiftr/s %d;\n", idx_reg);
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clr_word(idx_reg);
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put_vec_to_lval(net, slices);
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break;
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default:
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fprintf(vvp_out, "; UNSUPPORTED ASSIGNMENT OPCODE: %c\n", ivl_stmt_opcode(net));
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assert(0);
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break;
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}
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if (slices) free(slices);
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return 0;
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}
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@ -817,42 +815,11 @@ static void store_real_to_lval(ivl_lval_t lval)
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clr_word(word_ix);
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}
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/*
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* This function assigns a value to a real variable. This is destined
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* for /dev/null when typed ivl_signal_t takes over all the real
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* variable support.
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*/
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static int show_stmt_assign_sig_real(ivl_statement_t net)
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static void draw_stmt_assign_real_opcode(unsigned char opcode)
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{
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struct real_lval_info*slice = 0;
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ivl_lval_t lval;
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assert(ivl_stmt_lvals(net) == 1);
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lval = ivl_stmt_lval(net, 0);
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ivl_expr_t rval = ivl_stmt_rval(net);
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if (ivl_expr_type(rval) == IVL_EX_ARRAY_PATTERN) {
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ivl_signal_t sig = ivl_lval_sig(lval);
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draw_array_pattern(sig, rval, 0);
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return 0;
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}
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/* If this is a compressed assignment, then get the contents
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of the l-value. We need this value as part of the r-value
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calculation. */
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if (ivl_stmt_opcode(net) != 0) {
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fprintf(vvp_out, " ; show_stmt_assign_real: Get l-value for compressed %c= operand\n", ivl_stmt_opcode(net));
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slice = calloc(1, sizeof(struct real_lval_info));
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get_real_from_lval(lval, slice);
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}
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draw_eval_real(rval);
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switch (ivl_stmt_opcode(net)) {
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switch (opcode) {
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case 0:
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store_real_to_lval(lval);
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if (slice) free(slice);
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return 0;
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break;
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case '+':
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fprintf(vvp_out, " %%add/wr;\n");
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@ -875,13 +842,47 @@ static int show_stmt_assign_sig_real(ivl_statement_t net)
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break;
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default:
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fprintf(vvp_out, "; UNSUPPORTED ASSIGNMENT OPCODE: %c\n", ivl_stmt_opcode(net));
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fprintf(vvp_out, "; UNSUPPORTED ASSIGNMENT OPCODE: %c\n", opcode);
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assert(0);
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break;
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}
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}
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/*
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* This function assigns a value to a real variable. This is destined
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* for /dev/null when typed ivl_signal_t takes over all the real
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* variable support.
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*/
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static int show_stmt_assign_sig_real(ivl_statement_t net)
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{
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ivl_lval_t lval;
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assert(ivl_stmt_lvals(net) == 1);
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lval = ivl_stmt_lval(net, 0);
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ivl_expr_t rval = ivl_stmt_rval(net);
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if (ivl_expr_type(rval) == IVL_EX_ARRAY_PATTERN) {
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ivl_signal_t sig = ivl_lval_sig(lval);
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draw_array_pattern(sig, rval, 0);
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return 0;
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}
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/* If this is a compressed assignment, then get the contents
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of the l-value. We need this value as part of the r-value
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calculation. */
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if (ivl_stmt_opcode(net) != 0) {
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struct real_lval_info slice;
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fprintf(vvp_out, " ; show_stmt_assign_real: Get l-value for compressed %c= operand\n", ivl_stmt_opcode(net));
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get_real_from_lval(lval, &slice);
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draw_eval_real(rval);
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draw_stmt_assign_real_opcode(ivl_stmt_opcode(net));
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put_real_to_lval(lval, &slice);
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} else {
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draw_eval_real(rval);
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store_real_to_lval(lval);
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}
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put_real_to_lval(lval, slice);
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free(slice);
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return 0;
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}
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@ -1260,39 +1261,43 @@ static int show_stmt_assign_sig_cobject(ivl_statement_t net)
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ivl_type_t sig_type = ivl_signal_net_type(sig);
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ivl_type_t prop_type = ivl_type_prop_type(sig_type, prop_idx);
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if (ivl_type_base(prop_type) == IVL_VT_BOOL) {
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fprintf(vvp_out, " %%load/obj v%p_0;\n", sig);
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if (ivl_type_base(prop_type) == IVL_VT_BOOL ||
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ivl_type_base(prop_type) == IVL_VT_LOGIC) {
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assert(ivl_type_packed_dimensions(prop_type) == 0 ||
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(ivl_type_packed_dimensions(prop_type) == 1 &&
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ivl_type_packed_msb(prop_type,0) >= ivl_type_packed_lsb(prop_type, 0)));
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if (ivl_stmt_opcode(net) != 0) {
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fprintf(vvp_out, " %%prop/v %d;\n", prop_idx);
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}
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draw_eval_vec4(rval);
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if (ivl_expr_value(rval)!=IVL_VT_BOOL)
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if (ivl_type_base(prop_type) == IVL_VT_BOOL &&
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ivl_expr_value(rval) != IVL_VT_BOOL)
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fprintf(vvp_out, " %%cast2;\n");
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fprintf(vvp_out, " %%load/obj v%p_0;\n", sig);
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fprintf(vvp_out, " %%store/prop/v %d, %u; Store in bool property %s\n",
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prop_idx, lwid, ivl_type_prop_name(sig_type, prop_idx));
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fprintf(vvp_out, " %%pop/obj 1, 0;\n");
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draw_stmt_assign_vector_opcode(ivl_stmt_opcode(net),
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ivl_expr_signed(rval));
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} else if (ivl_type_base(prop_type) == IVL_VT_LOGIC) {
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assert(ivl_type_packed_dimensions(prop_type) == 0 ||
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(ivl_type_packed_dimensions(prop_type) == 1 &&
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ivl_type_packed_msb(prop_type,0) >= ivl_type_packed_lsb(prop_type, 0)));
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draw_eval_vec4(rval);
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fprintf(vvp_out, " %%load/obj v%p_0;\n", sig);
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fprintf(vvp_out, " %%store/prop/v %d, %u; Store in logic property %s\n",
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prop_idx, lwid, ivl_type_prop_name(sig_type, prop_idx));
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fprintf(vvp_out, " %%pop/obj 1, 0;\n");
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} else if (ivl_type_base(prop_type) == IVL_VT_REAL) {
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if (ivl_stmt_opcode(net) != 0) {
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fprintf(vvp_out, " %%prop/r %d;\n", prop_idx);
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}
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/* Calculate the real value into the real value
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stack. The %store/prop/r will pop the stack
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value. */
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draw_eval_real(rval);
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fprintf(vvp_out, " %%load/obj v%p_0;\n", sig);
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draw_stmt_assign_real_opcode(ivl_stmt_opcode(net));
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fprintf(vvp_out, " %%store/prop/r %d;\n", prop_idx);
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fprintf(vvp_out, " %%pop/obj 1, 0;\n");
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@ -1302,7 +1307,6 @@ static int show_stmt_assign_sig_cobject(ivl_statement_t net)
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stack. The %store/prop/r will pop the stack
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value. */
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draw_eval_string(rval);
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fprintf(vvp_out, " %%load/obj v%p_0;\n", sig);
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fprintf(vvp_out, " %%store/prop/str %d;\n", prop_idx);
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fprintf(vvp_out, " %%pop/obj 1, 0;\n");
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@ -1313,7 +1317,6 @@ static int show_stmt_assign_sig_cobject(ivl_statement_t net)
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/* The property is a darray, and there is no mux
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expression to the assignment is of an entire
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array object. */
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fprintf(vvp_out, " %%load/obj v%p_0;\n", sig);
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errors += draw_eval_object(rval);
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fprintf(vvp_out, " %%store/prop/obj %d, %d; IVL_VT_DARRAY\n", prop_idx, idx);
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fprintf(vvp_out, " %%pop/obj 1, 0;\n");
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@ -1327,7 +1330,6 @@ static int show_stmt_assign_sig_cobject(ivl_statement_t net)
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}
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/* The property is a class object. */
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fprintf(vvp_out, " %%load/obj v%p_0;\n", sig);
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errors += draw_eval_object(rval);
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if (idx_expr) draw_eval_expr_into_integer(idx_expr, idx);
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fprintf(vvp_out, " %%store/prop/obj %d, %d; IVL_VT_CLASS\n", prop_idx, idx);
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