Parse component declarations / parse signal declarations.

These go into the architecture/block of their scope and will be
used by component instantiations to make sure the bindings are
correct and complete.

Also handle signal declarations. The elaborator will use these
to generate module local variables that are used by the architecture.

vhdlpp/architec.cc

@@ -22,9 +22,13 @@
 
 using namespace std;
 
-Architecture::Architecture(perm_string name, list<Architecture::Statement*>&s)
+Architecture::Architecture(perm_string name, map<perm_string,Signal*>&sigs,
+			   map<perm_string,ComponentBase*>&comps,
+			   list<Architecture::Statement*>&s)
 : name_(name)
 {
+      signals_ = sigs;
+      components_ = comps;
       statements_.splice(statements_.end(), s);
 }