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ivl: Disabled reg_flag for time type in SV.

This commit is contained in:
Maciej Suminski 2015-06-08 18:42:17 +02:00
parent cd3180d1c2
commit 80403d2ade
1 changed files with 1 additions and 1 deletions
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parse.y
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@ -1066,7 +1066,7 @@ data_type /* IEEE1800-2005: A.2.2.1 */
| K_time | K_time
{ list<pform_range_t>*pd = make_range_from_width(64); { list<pform_range_t>*pd = make_range_from_width(64);
vector_type_t*tmp = new vector_type_t(IVL_VT_LOGIC, false, pd); vector_type_t*tmp = new vector_type_t(IVL_VT_LOGIC, false, pd);
tmp->reg_flag = true; tmp->reg_flag = !gn_system_verilog();
$$ = tmp; $$ = tmp;
} }
| TYPE_IDENTIFIER dimensions_opt | TYPE_IDENTIFIER dimensions_opt