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Add arch=lpm to the documentation.

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steve 2003-08-07 05:17:34 +00:00
parent f4b8a4877f
commit 800e9dd76a
1 changed files with 13 additions and 3 deletions
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@ -2,7 +2,7 @@
FPGA LOADABLE CODE GENERATOR FOR Icarus Verilog FPGA LOADABLE CODE GENERATOR FOR Icarus Verilog
Copyright 2001 Stephen Williams Copyright 2001 Stephen Williams
$Id: fpga.txt,v 1.10 2003/07/04 03:57:19 steve Exp $ $Id: fpga.txt,v 1.11 2003/08/07 05:17:34 steve Exp $
The FPGA code generator supports a variety of FPGA devices, writing The FPGA code generator supports a variety of FPGA devices, writing
XNF or EDIF depending on the target. You can select the architecture XNF or EDIF depending on the target. You can select the architecture
@ -25,14 +25,21 @@ different output file is specified with the -o flag.
The following is a list of architecture types that this code generator The following is a list of architecture types that this code generator
supports. supports.
* arch=generic-edif * arch=lpm
This is a device independent format, where the gates are device types
as defined by the LPM 2 1 0 specification. Some backend tools may take
this format, or users may write interface libraries to connect these
netlists to the device in question.
* arch=generic-edif (obsolete)
This is generic EDIF code. It doesn't necessarily work because the This is generic EDIF code. It doesn't necessarily work because the
external library is not available to the code generator. But, what it external library is not available to the code generator. But, what it
does is generate generic style gates that a portability library can does is generate generic style gates that a portability library can
map to target gates if desired. map to target gates if desired.
* arch=generic-xnf * arch=generic-xnf (obsolete)
If this is selected, then the output is formatted as an XNF file, If this is selected, then the output is formatted as an XNF file,
suitable for most any type of device. The devices that it emits suitable for most any type of device. The devices that it emits
@ -181,6 +188,9 @@ Compile a single-file design with command line tools like so:
--- ---
$Log: fpga.txt,v $ $Log: fpga.txt,v $
Revision 1.11 2003/08/07 05:17:34 steve
Add arch=lpm to the documentation.
Revision 1.10 2003/07/04 03:57:19 steve Revision 1.10 2003/07/04 03:57:19 steve
Allow attributes on Verilog 2001 port declarations. Allow attributes on Verilog 2001 port declarations.