Add error recovery when elaboration of a type range fails.

If elaboration of the msb or lsb expression in the range of a vector
type specification failed (due to an error in the Verilog code being
compiled), an assertion failure was being triggered when the compiler
attempted to evaluate the expressions. Bypassing the evaluation (and
using a default value) should allow us to recover from the error.
This commit is contained in:
Martin Whitaker 2014-10-30 20:42:12 +00:00
parent 3e9c14060f
commit 7fad4779c5
1 changed files with 6 additions and 4 deletions

View File

@ -126,18 +126,20 @@ ivl_type_s* vector_type_t::elaborate_type_raw(Design*des, NetScope*scope) const
; cur != pdims->end() ; ++ cur) {
NetExpr*me = elab_and_eval(des, scope, cur->first, 0, true);
assert(me);
NetExpr*le = elab_and_eval(des, scope, cur->second, 0, true);
assert(le);
/* If elaboration failed for either expression, we
should have already reported the error, so just
skip the following evaluation to recover. */
long mnum = 0, lnum = 0;
if ( ! eval_as_long(mnum, me) ) {
if ( me && ! eval_as_long(mnum, me) ) {
assert(0);
des->errors += 1;
}
if ( ! eval_as_long(lnum, le) ) {
if ( le && ! eval_as_long(lnum, le) ) {
assert(0);
des->errors += 1;
}