Reduction OR operator
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@ -19,6 +19,7 @@
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*/
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*/
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#include "vhdl_target.h"
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#include "vhdl_target.h"
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#include "support.hh"
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#include <iostream>
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#include <iostream>
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#include <cassert>
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#include <cassert>
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@ -132,7 +133,10 @@ static vhdl_expr *translate_unary(ivl_expr_t e)
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case 'N': // NOR
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case 'N': // NOR
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case '|':
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case '|':
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{
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{
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vhdl_fcall *f = new vhdl_fcall("Reduce_OR", vhdl_type::std_logic());
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require_support_function(SF_REDUCE_OR);
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vhdl_fcall *f =
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new vhdl_fcall(support_function::function_name(SF_REDUCE_OR),
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vhdl_type::std_logic());
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f->add_expr(operand);
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f->add_expr(operand);
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if ('N' == opcode)
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if ('N' == opcode)
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return new vhdl_unaryop_expr(VHDL_UNARYOP_NOT, f, vhdl_type::std_logic());
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return new vhdl_unaryop_expr(VHDL_UNARYOP_NOT, f, vhdl_type::std_logic());
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@ -170,15 +170,18 @@ static vhdl_expr *ufunc_lpm_to_expr(vhdl_scope *scope, ivl_lpm_t lpm)
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}
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}
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static vhdl_expr *reduction_lpm_to_expr(vhdl_scope *scope, ivl_lpm_t lpm,
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static vhdl_expr *reduction_lpm_to_expr(vhdl_scope *scope, ivl_lpm_t lpm,
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const char *rfunc, bool invert)
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support_function_t f, bool invert)
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{
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{
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vhdl_fcall *fcall = new vhdl_fcall(rfunc, vhdl_type::std_logic());
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require_support_function(f);
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vhdl_fcall *fcall = new vhdl_fcall(support_function::function_name(f),
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vhdl_type::std_logic());
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vhdl_var_ref *ref = nexus_to_var_ref(scope, ivl_lpm_data(lpm, 0));
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vhdl_var_ref *ref = nexus_to_var_ref(scope, ivl_lpm_data(lpm, 0));
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if (NULL == ref)
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if (NULL == ref)
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return NULL;
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return NULL;
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fcall->add_expr(ref);
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vhdl_type std_logic_vector(VHDL_TYPE_STD_LOGIC_VECTOR);
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fcall->add_expr(ref->cast(&std_logic_vector));
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if (invert)
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if (invert)
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return new vhdl_unaryop_expr
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return new vhdl_unaryop_expr
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@ -258,18 +261,18 @@ static vhdl_expr *lpm_to_expr(vhdl_scope *scope, ivl_lpm_t lpm)
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return part_select_pv_lpm_to_expr(scope, lpm);
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return part_select_pv_lpm_to_expr(scope, lpm);
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case IVL_LPM_UFUNC:
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case IVL_LPM_UFUNC:
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return ufunc_lpm_to_expr(scope, lpm);
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return ufunc_lpm_to_expr(scope, lpm);
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case IVL_LPM_RE_AND:
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/*case IVL_LPM_RE_AND:
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return reduction_lpm_to_expr(scope, lpm, "Reduce_AND", false);
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return reduction_lpm_to_expr(scope, lpm, "Reduce_AND", false);
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case IVL_LPM_RE_NAND:
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case IVL_LPM_RE_NAND:
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return reduction_lpm_to_expr(scope, lpm, "Reduce_AND", true);
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return reduction_lpm_to_expr(scope, lpm, "Reduce_AND", true);*/
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case IVL_LPM_RE_NOR:
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case IVL_LPM_RE_NOR:
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return reduction_lpm_to_expr(scope, lpm, "Reduce_OR", true);
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return reduction_lpm_to_expr(scope, lpm, SF_REDUCE_OR, true);
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case IVL_LPM_RE_OR:
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case IVL_LPM_RE_OR:
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return reduction_lpm_to_expr(scope, lpm, "Reduce_OR", false);
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return reduction_lpm_to_expr(scope, lpm, SF_REDUCE_OR, false);
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case IVL_LPM_RE_XOR:
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/*case IVL_LPM_RE_XOR:
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return reduction_lpm_to_expr(scope, lpm, "Reduce_XOR", false);
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return reduction_lpm_to_expr(scope, lpm, "Reduce_XOR", false);
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case IVL_LPM_RE_XNOR:
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case IVL_LPM_RE_XNOR:
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return reduction_lpm_to_expr(scope, lpm, "Reduce_XNOR", false);
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return reduction_lpm_to_expr(scope, lpm, "Reduce_XNOR", false);*/
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case IVL_LPM_SIGN_EXT:
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case IVL_LPM_SIGN_EXT:
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return sign_extend_lpm_to_expr(scope, lpm);
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return sign_extend_lpm_to_expr(scope, lpm);
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case IVL_LPM_ARRAY:
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case IVL_LPM_ARRAY:
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@ -22,6 +22,7 @@
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#include "support.hh"
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#include "support.hh"
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#include <cassert>
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#include <cassert>
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#include <iostream>
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void require_support_function(support_function_t f)
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void require_support_function(support_function_t f)
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{
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{
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@ -39,6 +40,8 @@ const char *support_function::function_name(support_function_t type)
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return "Signed_To_Boolean";
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return "Signed_To_Boolean";
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case SF_BOOLEAN_TO_LOGIC:
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case SF_BOOLEAN_TO_LOGIC:
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return "Boolean_To_Logic";
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return "Boolean_To_Logic";
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case SF_REDUCE_OR:
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return "Reduce_OR";
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default:
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default:
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assert(false);
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assert(false);
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}
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}
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@ -48,10 +51,10 @@ vhdl_type *support_function::function_type(support_function_t type)
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{
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{
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switch (type) {
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switch (type) {
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case SF_UNSIGNED_TO_BOOLEAN:
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case SF_UNSIGNED_TO_BOOLEAN:
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return vhdl_type::boolean();
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case SF_SIGNED_TO_BOOLEAN:
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case SF_SIGNED_TO_BOOLEAN:
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return vhdl_type::boolean();
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return vhdl_type::boolean();
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case SF_BOOLEAN_TO_LOGIC:
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case SF_BOOLEAN_TO_LOGIC:
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case SF_REDUCE_OR:
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return vhdl_type::std_logic();
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return vhdl_type::std_logic();
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default:
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default:
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assert(false);
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assert(false);
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@ -82,6 +85,16 @@ void support_function::emit(std::ostream &of, int level) const
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<< "return '0'" << nl_string(indent(level))
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<< "return '0'" << nl_string(indent(level))
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<< "end if;" << nl_string(level);
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<< "end if;" << nl_string(level);
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break;
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break;
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case SF_REDUCE_OR:
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of << "(X : std_logic_vector) return std_logic is" << nl_string(level)
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<< "begin" << nl_string(indent(level))
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<< "for I in X'Range loop" << nl_string(indent(indent(level)))
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<< "if X(I) = '1' then" << nl_string(indent(indent(indent(level))))
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<< "return '1';" << nl_string(indent(indent(level)))
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<< "end if;" << nl_string(indent(level))
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<< "end loop;" << nl_string(indent(level))
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<< "return '0';" << nl_string(level);
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break;
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default:
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default:
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assert(false);
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assert(false);
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}
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}
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@ -27,6 +27,7 @@ enum support_function_t {
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SF_UNSIGNED_TO_BOOLEAN,
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SF_UNSIGNED_TO_BOOLEAN,
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SF_SIGNED_TO_BOOLEAN,
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SF_SIGNED_TO_BOOLEAN,
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SF_BOOLEAN_TO_LOGIC,
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SF_BOOLEAN_TO_LOGIC,
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SF_REDUCE_OR,
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};
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};
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class support_function : public vhdl_function {
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class support_function : public vhdl_function {
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