Remove dead %load/vp0 instructions and related infrastructure

Also remove some &A<> and &PV<> symbols that use this now dead
infrastructure.
This commit is contained in:
Stephen Williams 2014-11-19 09:02:21 -08:00
parent 301edf69d3
commit 725ed869ba
9 changed files with 7 additions and 280 deletions

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@ -147,10 +147,6 @@ struct __vpiArrayVthrA : public __vpiHandle {
vpiHandle address_handle;
// If wid==0, then address is the address into the array.
unsigned address;
// If wid >0, then the address is the base and wid the vector
// width of the index to pull from the thread.
unsigned wid;
bool is_signed;
unsigned get_address() const
{
@ -170,39 +166,7 @@ struct __vpiArrayVthrA : public __vpiHandle {
return vp.value.integer;
}
if (wid == 0)
return address;
/* Get the value from thread space. */
int tval = 0;
for (unsigned idx = 0 ; (idx < wid) && (idx < 8*sizeof(tval));
idx += 1) {
vvp_bit4_t bit = vthread_get_bit(vpip_current_vthread,
address + idx);
switch (bit) {
case BIT4_X:
case BIT4_Z:
/* Return UINT_MAX to indicate an X base. */
return UINT_MAX;
case BIT4_1:
tval |= 1<<idx;
break;
case BIT4_0:
break; // Do nothing!
}
}
if (is_signed && (wid < 8*sizeof(tval))) {
vvp_bit4_t msb = vthread_get_bit(vpip_current_vthread,
address + wid - 1);
if (msb == BIT4_1) {
tval |= ~((1 << wid) - 1);
}
}
return tval;
}
};
@ -773,12 +737,9 @@ static int vpi_array_vthr_A_get(int code, vpiHandle ref)
#endif
// If address_handle is not zero we definitely have a
// variable. If the wid is not zero we have a calculation
// from thread space which probably includes a variable.
// This assumes that the compiler is squashing all the
// constant expressions down to a single value.
// variable.
case vpiConstantSelect:
return obj->address_handle == 0 && obj->wid == 0;
return obj->address_handle == 0;
default:
return 0;
@ -1987,35 +1948,6 @@ vpiHandle vpip_make_vthr_A(char*label, unsigned addr)
obj->address_handle = 0;
obj->address = addr;
obj->wid = 0;
return obj;
}
/*
* &A<label,tbase,twid,s>
* This represents a VPI handle for an addressed word, where the word
* address in thread vector space. The tbase/twod/is_signed variables
* are the location and interpretation of the bits. This comes from
* source expressions that look like label[<expr>].
*/
vpiHandle vpip_make_vthr_A(char*label, unsigned tbase, unsigned twid,
char*is_signed)
{
struct __vpiArrayVthrA*obj = new __vpiArrayVthrA;
array_resolv_list_t*resolv_mem
= new array_resolv_list_t(label);
resolv_mem->array = &obj->array;
resolv_submit(resolv_mem);
obj->address_handle = 0;
obj->address = tbase;
obj->wid = twid;
obj->is_signed = strcmp(is_signed, "s") == 0;
delete [] is_signed;
return obj;
}
@ -2039,7 +1971,6 @@ vpiHandle vpip_make_vthr_A(char*label, char*symbol)
obj->address_handle = 0;
compile_vpi_lookup(&obj->address_handle, symbol);
obj->address = 0;
obj->wid = 0;
return obj;
}
@ -2056,7 +1987,6 @@ vpiHandle vpip_make_vthr_A(char*label, vpiHandle handle)
obj->address_handle = handle;
obj->address = 0;
obj->wid = 0;
return obj;
}

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@ -139,8 +139,6 @@ extern bool of_LOAD_STR(vthread_t thr, vvp_code_t code);
extern bool of_LOAD_STRA(vthread_t thr, vvp_code_t code);
extern bool of_LOAD_VEC4(vthread_t thr, vvp_code_t code);
extern bool of_LOAD_VEC4A(vthread_t thr, vvp_code_t code);
extern bool of_LOAD_VP0(vthread_t thr, vvp_code_t code);
extern bool of_LOAD_VP0_S(vthread_t thr, vvp_code_t code);
extern bool of_MAX_WR(vthread_t thr, vvp_code_t code);
extern bool of_MIN_WR(vthread_t thr, vvp_code_t code);
extern bool of_MOD(vthread_t thr, vvp_code_t code);

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@ -187,8 +187,6 @@ static const struct opcode_table_s opcode_table[] = {
{ "%load/stra", of_LOAD_STRA, 2,{OA_ARR_PTR, OA_BIT1, OA_NONE} },
{ "%load/vec4", of_LOAD_VEC4, 1,{OA_FUNC_PTR,OA_NONE, OA_NONE} },
{ "%load/vec4a", of_LOAD_VEC4A,2,{OA_ARR_PTR, OA_BIT1, OA_NONE} },
{ "%load/vp0",of_LOAD_VP0,3,{OA_BIT1, OA_FUNC_PTR, OA_BIT2} },
{ "%load/vp0/s",of_LOAD_VP0_S,3,{OA_BIT1, OA_FUNC_PTR, OA_BIT2} },
{ "%max/wr", of_MAX_WR, 0, {OA_NONE, OA_NONE, OA_NONE} },
{ "%min/wr", of_MIN_WR, 0, {OA_NONE, OA_NONE, OA_NONE} },
{ "%mod", of_MOD, 0, {OA_NONE, OA_NONE, OA_NONE} },

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@ -705,19 +705,6 @@ holds the canonical array index.
The load checks flag bit 4. If it is 1, then the load it cancelled and
replaced with a load of all X bits. See %ix/vec4.
* %load/vp0 <bit>, <functor-label>, <wid>
* %load/vp0/s <bit>, <functor-label>, <wid>
This instruction is the similar %load/v above, except that it also
adds the signed integer value in index register 0 into the loaded
value. The addition is a Verilog-style add, which means that if any of
the input bits are X or Z, the entire result is turned into a vector
of X bits.
The <wid> is, line the %load/v, the result width. But unlike the
%load/v, the vector is padded with 0s (%load/vp0) or sign extended
(%load/vp0/s) to the desired width.
* %load/ar <array-label>, <index>
The %load/ar instruction reads a real value from an array. The <index>

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@ -1088,8 +1088,6 @@ argument
symbol_access
: K_A '<' T_SYMBOL ',' T_NUMBER '>'
{ $$ = vpip_make_vthr_A($3, $5); }
| K_A '<' T_SYMBOL ',' T_NUMBER T_NUMBER T_STRING '>'
{ $$ = vpip_make_vthr_A($3, $5, $6, $7); }
| K_A '<' T_SYMBOL ',' T_SYMBOL '>'
{ $$ = vpip_make_vthr_A($3, $5); }
| K_A '<' T_SYMBOL ',' symbol_access '>'
@ -1102,8 +1100,6 @@ symbol_access
{ $$ = vpip_make_PV($3, $5, $7); }
| K_PV '<' T_SYMBOL ',' symbol_access ',' T_NUMBER '>'
{ $$ = vpip_make_PV($3, $5, $7); }
| K_PV '<' T_SYMBOL ',' T_NUMBER T_NUMBER T_STRING ',' T_NUMBER '>'
{ $$ = vpip_make_PV($3, $5, $6, $7, $9); }
| K_APV '<' T_SYMBOL ',' T_NUMBER ',' T_NUMBER ',' T_NUMBER '>'
{ $$ = vpip_make_vthr_APV($3, $5, $7, $9); }
;

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@ -355,14 +355,11 @@ struct __vpiPV : public __vpiHandle {
vvp_net_t*net;
vpiHandle sbase;
int tbase;
unsigned twid, width;
bool is_signed;
unsigned width;
};
extern vpiHandle vpip_make_PV(char*name, int base, int width);
extern vpiHandle vpip_make_PV(char*name, char*symbol, int width);
extern vpiHandle vpip_make_PV(char*name, vpiHandle handle, int width);
extern vpiHandle vpip_make_PV(char*name, int tbase, int twid, char*is_signed,
int width);
struct __vpiModPathTerm : public __vpiHandle {
__vpiModPathTerm();
@ -683,8 +680,6 @@ vpiHandle vpip_make_vthr_vec4_stack(unsigned depth, bool signed_flag, unsigned w
vpiHandle vpip_make_vthr_A(char*label, unsigned index);
vpiHandle vpip_make_vthr_A(char*label, char*symbol);
vpiHandle vpip_make_vthr_A(char*label, unsigned tbase, unsigned twid,
char*is_signed);
vpiHandle vpip_make_vthr_A(char*label, vpiHandle handle);
vpiHandle vpip_make_vthr_APV(char*label, unsigned index, unsigned bit, unsigned wid);

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@ -1164,39 +1164,7 @@ static int PV_get_base(struct __vpiPV*rfp)
}
/* If the width is zero then tbase is the constant. */
if (rfp->twid == 0) return rfp->tbase;
/* Get the value from thread space. */
int tval = 0;
for (unsigned idx = 0 ; (idx < rfp->twid) && (idx < 8*sizeof(tval));
idx += 1) {
vvp_bit4_t bit = vthread_get_bit(vpip_current_vthread,
rfp->tbase + idx);
switch (bit) {
case BIT4_X:
case BIT4_Z:
/* We use INT_MIN to indicate an X base. */
return INT_MIN;
case BIT4_1:
tval |= 1<<idx;
break;
case BIT4_0:
break; // Do nothing!
}
}
/* Check to see if we need to sign extend the result. */
if (rfp->is_signed && (rfp->twid < 8*sizeof(tval))) {
vvp_bit4_t msb = vthread_get_bit(vpip_current_vthread,
rfp->tbase + rfp->twid - 1);
if (msb == BIT4_1) {
tval |= ~((1 << rfp->twid) - 1);
}
}
return tval;
return rfp->tbase;
}
static int PV_get(int code, vpiHandle ref)
@ -1217,7 +1185,7 @@ static int PV_get(int code, vpiHandle ref)
/* This is like the &A<> in array.cc. */
case vpiConstantSelect:
return rfp->sbase == 0 && rfp->twid == 0;
return rfp->sbase == 0;
case vpiLeftRange:
rval += rfp->width - 1;
@ -1419,7 +1387,6 @@ vpiHandle vpip_make_PV(char*var, int base, int width)
obj->parent = vvp_lookup_handle(var);
obj->sbase = 0;
obj->tbase = base;
obj->twid = 0;
obj->width = (unsigned) width;
obj->net = 0;
functor_ref_lookup(&obj->net, var);
@ -1433,7 +1400,6 @@ vpiHandle vpip_make_PV(char*var, char*symbol, int width)
obj->parent = vvp_lookup_handle(var);
compile_vpi_lookup(&obj->sbase, symbol);
obj->tbase = 0;
obj->twid = 0;
obj->width = (unsigned) width;
obj->net = 0;
functor_ref_lookup(&obj->net, var);
@ -1447,7 +1413,6 @@ vpiHandle vpip_make_PV(char*var, vpiHandle handle, int width)
obj->parent = vvp_lookup_handle(var);
obj->sbase = handle;
obj->tbase = 0;
obj->twid = 0;
obj->width = (unsigned) width;
obj->net = 0;
functor_ref_lookup(&obj->net, var);
@ -1455,23 +1420,6 @@ vpiHandle vpip_make_PV(char*var, vpiHandle handle, int width)
return obj;
}
vpiHandle vpip_make_PV(char*var, int tbase, int twid, char*is_signed, int width)
{
struct __vpiPV*obj = new __vpiPV;
obj->parent = vvp_lookup_handle(var);
obj->sbase = 0;
obj->tbase = tbase;
obj->twid = (unsigned) twid;
obj->is_signed = strcmp(is_signed, "s") == 0;
obj->width = (unsigned) width;
obj->net = 0;
functor_ref_lookup(&obj->net, var);
delete [] is_signed;
return obj;
}
#ifdef CHECK_WITH_VALGRIND
void PV_delete(vpiHandle item)
{

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@ -102,7 +102,6 @@ struct vthread_s {
/* This is the program counter. */
vvp_code_t pc;
/* These hold the private thread bits. */
//vvp_vector4_t bits4;
enum { FLAGS_COUNT = 256, WORDS_COUNT = 16 };
vvp_bit4_t flags[FLAGS_COUNT];
@ -313,47 +312,8 @@ struct vthread_s*running_thread = 0;
// this table maps the thread special index bit addresses to
// vvp_bit4_t bit values.
static vvp_bit4_t thr_index_to_bit4[4] = { BIT4_0, BIT4_1, BIT4_X, BIT4_Z };
static inline void thr_check_addr(struct vthread_s*thr, unsigned addr)
{
if (thr->bits4.size() <= addr)
thr->bits4.resize(addr+1);
}
static inline vvp_bit4_t thr_get_bit(struct vthread_s*thr, unsigned addr)
{
assert(addr < thr->bits4.size());
return thr->bits4.value(addr);
}
static inline void thr_put_bit(struct vthread_s*thr,
unsigned addr, vvp_bit4_t val)
{
thr_check_addr(thr, addr);
thr->bits4.set_bit(addr, val);
}
#endif
vvp_bit4_t vthread_get_bit(struct vthread_s* /*thr*/, unsigned addr)
{
#if 0
if (vpi_mode_flag == VPI_MODE_COMPILETF) return BIT4_X;
else return thr_get_bit(thr, addr);
#else
fprintf(stderr, "XXXX NOT IMPLEMENTED: vthread_get_bit(..., %u)\n", addr);
return BIT4_X;
#endif
}
void vthread_put_bit(struct vthread_s* /*thr*/, unsigned addr, vvp_bit4_t bit)
{
#if 0
thr_put_bit(thr, addr, bit);
#else
fprintf(stderr, "XXXX NOT IMPLEMENTED: vthread_put_bit(..., %u, %u)\n", addr, bit);
#endif
}
void vthread_push_vec4(struct vthread_s*thr, const vvp_vector4_t&val)
{
thr->push_vec4(val);
@ -3337,49 +3297,6 @@ bool of_LOAD_DAR_VEC4(vthread_t thr, vvp_code_t cp)
return true;
}
/*
* %load/vp0, %load/vp0/s, %load/avp0 and %load/avp0/s share this function.
*/
#if (SIZEOF_UNSIGNED_LONG >= 8)
# define CPU_WORD_STRIDE CPU_WORD_BITS - 1 // avoid a warning
#else
# define CPU_WORD_STRIDE CPU_WORD_BITS
#endif
static void load_vp0_common(vthread_t thr, vvp_code_t cp, const vvp_vector4_t&sig_value)
{
#if 0
unsigned bit = cp->bit_idx[0];
unsigned wid = cp->bit_idx[1];
int64_t addend = thr->words[0].w_int;
/* Check the address once, before we scan the vector. */
thr_check_addr(thr, bit+wid-1);
unsigned long*val = sig_value.subarray(0, wid);
if (val == 0) {
vvp_vector4_t tmp(wid, BIT4_X);
thr->bits4.set_vec(bit, tmp);
return;
}
unsigned words = (wid + CPU_WORD_BITS - 1) / CPU_WORD_BITS;
unsigned long carry = 0;
unsigned long imm = addend;
for (unsigned idx = 0 ; idx < words ; idx += 1) {
val[idx] = add_with_carry(val[idx], imm, carry);
addend >>= CPU_WORD_STRIDE;
imm = addend;
}
/* Copy the vector bits into the bits4 vector. Do the copy
directly to skip the excess calls to thr_check_addr. */
thr->bits4.setarray(bit, wid, val);
delete[]val;
#else
fprintf(stderr, "XXXX NOT IMPLEMENTED: load_vp0_common()\n");
#endif
}
/*
* %load/obj <var-label>
*/
@ -3534,43 +3451,6 @@ bool of_LOAD_VEC4A(vthread_t thr, vvp_code_t cp)
return true;
}
/*
* This is like of_LOAD_VEC, but includes an add of an integer value from
* index 0. The <wid> is the expected result width not the vector width.
*/
bool of_LOAD_VP0(vthread_t thr, vvp_code_t cp)
{
unsigned wid = cp->bit_idx[1];
/* We need a vector this wide to make the math work correctly.
* Copy the base bits into the vector, but keep the width. */
vvp_vector4_t sig_value(wid, BIT4_0);
vvp_vector4_t tmp;
load_base(cp, tmp);
sig_value.copy_bits(tmp);
load_vp0_common(thr, cp, sig_value);
return true;
}
bool of_LOAD_VP0_S(vthread_t thr, vvp_code_t cp)
{
unsigned wid = cp->bit_idx[1];
vvp_vector4_t tmp;
load_base(cp, tmp);
/* We need a vector this wide to make the math work correctly.
* Copy the base bits into the vector, but keep the width. */
vvp_vector4_t sig_value(wid, tmp.value(tmp.size()-1));
sig_value.copy_bits(tmp);
load_vp0_common(thr, cp, sig_value);
return true;
}
static void do_verylong_mod(vthread_t thr,
vvp_vector4_t&vala, const vvp_vector4_t&valb,
bool left_is_neg, bool right_is_neg)

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@ -109,13 +109,8 @@ extern vvp_context_item_t vthread_get_wt_context_item(unsigned context_idx);
extern vvp_context_item_t vthread_get_rd_context_item(unsigned context_idx);
/*
* Return a bit from the thread's bit space. These are used, for
* example, when a VPI implementation function needs to access the bit
* space of the thread.
* Access value stacks from thread space.
*/
extern vvp_bit4_t vthread_get_bit(struct vthread_s*thr, unsigned addr);
extern void vthread_put_bit(struct vthread_s*thr, unsigned addr, vvp_bit4_t bit);
extern void vthread_push_vec4(struct vthread_s*thr, const vvp_vector4_t&val);
extern void vthread_push_real(struct vthread_s*thr, double val);