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Improve error message on assignment to an array or array slice (issue #562). 

This is valid SystemVerilog, but not something we support yet.
This commit is contained in:
Martin Whitaker 2021-11-12 21:43:24 +00:00
parent 61aed6882c
commit 71c36d1289
1 changed files with 11 additions and 5 deletions
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16
elab_lval.cc
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@ -259,12 +259,18 @@ NetAssign_* PEIdent::elaborate_lval(Design*des,
use_sel = name_tail.index.back().sel;
// Special case: The l-value is an entire memory, or array
// slice. This is, in fact, an error in l-values. Detect the
// situation by noting if the index count is less than the
// array dimensions (unpacked).
// slice. Detect the situation by noting if the index count
// is less than the array dimensions (unpacked).
if (reg->unpacked_dimensions() > name_tail.index.size()) {
cerr << get_fileline() << ": error: Cannot assign to array "
<< path_ << ". Did you forget a word index?" << endl;
if (gn_system_verilog()) {
cerr << get_fileline() << ": sorry: Assignment to an entire"
" array or to an array slice is not yet supported."
<< endl;
} else {
cerr << get_fileline() << ": error: Assignment to an entire"
" array or to an array slice requires SystemVerilog."
<< endl;
}
des->errors += 1;
return 0;
}