Improve error message on assignment to an array or array slice (issue #562).
This is valid SystemVerilog, but not something we support yet.
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elab_lval.cc
16
elab_lval.cc
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@ -259,12 +259,18 @@ NetAssign_* PEIdent::elaborate_lval(Design*des,
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use_sel = name_tail.index.back().sel;
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use_sel = name_tail.index.back().sel;
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// Special case: The l-value is an entire memory, or array
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// Special case: The l-value is an entire memory, or array
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// slice. This is, in fact, an error in l-values. Detect the
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// slice. Detect the situation by noting if the index count
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// situation by noting if the index count is less than the
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// is less than the array dimensions (unpacked).
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// array dimensions (unpacked).
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if (reg->unpacked_dimensions() > name_tail.index.size()) {
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if (reg->unpacked_dimensions() > name_tail.index.size()) {
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cerr << get_fileline() << ": error: Cannot assign to array "
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if (gn_system_verilog()) {
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<< path_ << ". Did you forget a word index?" << endl;
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cerr << get_fileline() << ": sorry: Assignment to an entire"
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" array or to an array slice is not yet supported."
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<< endl;
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} else {
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cerr << get_fileline() << ": error: Assignment to an entire"
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" array or to an array slice requires SystemVerilog."
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<< endl;
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}
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des->errors += 1;
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des->errors += 1;
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return 0;
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return 0;
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}
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}
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