luke
/
iverilog
mirror of https://github.com/steveicarus/iverilog.git
1
0
Fork 0
Code Issues Packages Projects Releases Wiki Activity

Merge branch 'master' of github.com:steveicarus/iverilog

This commit is contained in:
Cary R 2016-02-10 22:33:21 -08:00
parent 03cb74ba57 12c39aa4bb
commit 70a350f2e8
1 changed files with 1 additions and 1 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
elab_sig.cc
View File

@ -987,7 +987,7 @@ NetNet* PWire::elaborate_sig(Design*des, NetScope*scope) const
if (warn_implicit_dimensions if (warn_implicit_dimensions
&& port_set_ && net_set_ && port_set_ && net_set_
&& port_.empty() && net_.empty()) { && port_.empty() && !net_.empty()) {
cerr << get_fileline() << ": warning: " cerr << get_fileline() << ": warning: "
<< "Port declaration of " << basename() << "Port declaration of " << basename()
<< " inherits dimensions from var/net." << endl; << " inherits dimensions from var/net." << endl;