mirror of
https://github.com/steveicarus/iverilog.git
synced 2026-08-22 05:47:31 +02:00
Fixed warnings about shifting a negative value
This commit is contained in:
committed by
Martin Whitaker
parent
dbc536c4fb
commit
6e460a6a3f
+3
-3
@@ -3771,9 +3771,9 @@ bool of_MOD_S(vthread_t thr, vvp_code_t)
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/* Sign extend the signed operands when needed. */
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if (wid < 8*sizeof(long long)) {
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if (lv & (1LL << (wid-1)))
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lv |= -1LL << wid;
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lv |= -1ULL << wid;
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if (rv & (1LL << (wid-1)))
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rv |= -1LL << wid;
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rv |= -1ULL << wid;
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}
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lv %= rv;
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@@ -3925,7 +3925,7 @@ static bool of_PARTI_base(vthread_t thr, vvp_code_t cp, bool signed_flag)
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// NOTE: This is treating the vector as signed. Is that correct?
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int32_t use_base = base;
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if (signed_flag && bwid < 32 && (base&(1<<(bwid-1)))) {
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use_base |= (-1) << bwid;
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use_base |= -1UL << bwid;
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}
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if (use_base >= (int32_t)value.size()) {
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+7
-7
@@ -987,8 +987,8 @@ void vvp_vector4_t::resize(unsigned newsize, vvp_bit4_t pad_bit)
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// no need for re-allocation so we are done now.
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if (newsize > size_) {
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if (unsigned fill = size_ % BITS_PER_WORD) {
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abits_ptr_[cnt-1] &= ~((-1L) << fill);
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bbits_ptr_[cnt-1] &= ~((-1L) << fill);
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abits_ptr_[cnt-1] &= ~((-1UL) << fill);
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bbits_ptr_[cnt-1] &= ~((-1UL) << fill);
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abits_ptr_[cnt-1] |= word_pad_abits << fill;
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bbits_ptr_[cnt-1] |= word_pad_bbits << fill;
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}
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@@ -1018,9 +1018,9 @@ void vvp_vector4_t::resize(unsigned newsize, vvp_bit4_t pad_bit)
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if (newsize > size_) {
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if (unsigned fill = size_ % BITS_PER_WORD) {
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newbits[cnt-1] &= ~((-1L) << fill);
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newbits[cnt-1] &= ~((-1UL) << fill);
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newbits[cnt-1] |= word_pad_abits << fill;
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newbits[newcnt+cnt-1] &= ~((-1L) << fill);
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newbits[newcnt+cnt-1] &= ~((-1UL) << fill);
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newbits[newcnt+cnt-1] |= word_pad_bbits << fill;
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}
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for (unsigned idx = cnt ; idx < newcnt ; idx += 1)
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@@ -1043,8 +1043,8 @@ void vvp_vector4_t::resize(unsigned newsize, vvp_bit4_t pad_bit)
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}
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if (newsize > size_) {
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abits_val_ &= ~((-1L) << size_);
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bbits_val_ &= ~((-1L) << size_);
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abits_val_ &= ~((-1UL) << size_);
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bbits_val_ &= ~((-1UL) << size_);
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abits_val_ |= word_pad_abits << size_;
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bbits_val_ |= word_pad_bbits << size_;
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}
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@@ -2018,7 +2018,7 @@ template <class INT>bool vector4_to_value(const vvp_vector4_t&vec, INT&val,
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if (is_signed && vec.value(vec.size()-1) == BIT4_1) {
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if (vec.size() < 8*sizeof(val))
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res |= (~static_cast<INT>(0)) << vec.size();
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res |= static_cast<INT>(-1ULL << vec.size());
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}
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val = res;
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