Fix implicit casts in assignments (part 5).
This patch removes some code that has been made redundant by the more general handling of implicit casts.
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e8d4039175
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51
elaborate.cc
51
elaborate.cc
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@ -92,6 +92,10 @@ void PGAssign::elaborate(Design*des, NetScope*scope) const
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return;
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return;
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}
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}
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#if 0
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// MTW, 01-Mar-2013. The expression elaboration rework should have
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// ensured that this can no longer occur. Leaving this here for the
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// moment, but it should be safe to remove it.
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if (type_is_vectorable(rval_expr->expr_type())
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if (type_is_vectorable(rval_expr->expr_type())
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&& type_is_vectorable(lval->data_type())
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&& type_is_vectorable(lval->data_type())
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&& rval_expr->expr_width() < lval->vector_width()) {
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&& rval_expr->expr_width() < lval->vector_width()) {
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@ -104,6 +108,7 @@ void PGAssign::elaborate(Design*des, NetScope*scope) const
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}
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}
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rval_expr = pad_to_width(rval_expr, lval->vector_width(), *this);
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rval_expr = pad_to_width(rval_expr, lval->vector_width(), *this);
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}
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}
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#endif
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NetNet*rval = rval_expr->synthesize(des, scope, rval_expr);
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NetNet*rval = rval_expr->synthesize(des, scope, rval_expr);
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@ -131,20 +136,10 @@ void PGAssign::elaborate(Design*des, NetScope*scope) const
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if (dynamic_cast<NetESignal*>(rval_expr))
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if (dynamic_cast<NetESignal*>(rval_expr))
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need_driver_flag = true;
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need_driver_flag = true;
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/* Cast the right side when needed. */
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#if 0
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if ((lval->data_type() == IVL_VT_REAL) &&
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// MTW, 01-Mar-2013. The expression elaboration rework should have
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(rval->data_type() != IVL_VT_REAL)) {
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// ensured that this can no longer occur. Leaving this here for the
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rval = cast_to_real(des, scope, rval);
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// moment, but it should be safe to remove it.
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need_driver_flag = false;
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} else if ((lval->data_type() == IVL_VT_BOOL) &&
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(rval->data_type() != IVL_VT_BOOL)) {
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rval = cast_to_int2(des, scope, rval, lval->vector_width());
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need_driver_flag = false;
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} else if ((lval->data_type() != IVL_VT_REAL) &&
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(rval->data_type() == IVL_VT_REAL)) {
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rval = cast_to_int4(des, scope, rval, lval->vector_width());
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need_driver_flag = false;
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}
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/* If the r-value insists on being smaller than the l-value
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/* If the r-value insists on being smaller than the l-value
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(perhaps it is explicitly sized) the pad it out to be the
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(perhaps it is explicitly sized) the pad it out to be the
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@ -157,10 +152,11 @@ void PGAssign::elaborate(Design*des, NetScope*scope) const
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else
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else
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rval = pad_to_width(des, rval, lval->vector_width(), *this);
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rval = pad_to_width(des, rval, lval->vector_width(), *this);
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}
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}
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#endif
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ivl_assert(*this, rval->vector_width() >= lval->vector_width());
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/* If, on the other hand, the r-value insists on being
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/* If the r-value insists on being larger than the l-value,
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LARGER than the l-value, use a part select to chop it down
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use a part select to chop it down down to size. */
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down to size. */
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if (lval->vector_width() < rval->vector_width()) {
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if (lval->vector_width() < rval->vector_width()) {
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NetPartSelect*tmp = new NetPartSelect(rval, 0,lval->vector_width(),
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NetPartSelect*tmp = new NetPartSelect(rval, 0,lval->vector_width(),
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NetPartSelect::VP);
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NetPartSelect::VP);
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@ -2555,19 +2551,6 @@ NetProc* PAssign::elaborate(Design*des, NetScope*scope) const
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return bl;
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return bl;
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}
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}
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if (lv->expr_type() == IVL_VT_BOOL && rv->expr_type() != IVL_VT_BOOL) {
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if (debug_elaborate)
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cerr << get_fileline() << ": debug: "
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<< "Cast expression to int2" << endl;
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rv = cast_to_int2(rv);
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}
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if (lv->expr_type() == IVL_VT_REAL && rv->expr_type() != IVL_VT_REAL) {
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if (debug_elaborate)
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cerr << get_fileline() << ": debug: "
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<< "Cast expression to real." << endl;
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rv = cast_to_real(rv);
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}
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if (lv->enumeration() && (lv->enumeration() != rv->enumeration())) {
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if (lv->enumeration() && (lv->enumeration() != rv->enumeration())) {
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cerr << get_fileline() << ": error: "
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cerr << get_fileline() << ": error: "
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<< "Enumeration type mismatch in assignment." << endl;
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<< "Enumeration type mismatch in assignment." << endl;
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@ -4029,14 +4012,6 @@ NetForce* PForce::elaborate(Design*des, NetScope*scope) const
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if (rexp == 0)
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if (rexp == 0)
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return 0;
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return 0;
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if (ltype==IVL_VT_BOOL && rexp->expr_type()!=IVL_VT_BOOL) {
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if (debug_elaborate) {
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cerr << get_fileline() << ": debug: "
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<< "Cast force rvalue to int2" << endl;
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}
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rexp = cast_to_int2(rexp);
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}
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dev = new NetForce(lval, rexp);
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dev = new NetForce(lval, rexp);
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if (debug_elaborate) {
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if (debug_elaborate) {
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16
netmisc.cc
16
netmisc.cc
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@ -138,22 +138,6 @@ NetNet* cast_to_real(Design*des, NetScope*scope, NetNet*src)
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return tmp;
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return tmp;
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}
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}
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NetExpr* cast_to_int2(NetExpr*expr)
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{
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// Special case: The expression is already BOOL
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if (expr->expr_type() == IVL_VT_BOOL)
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return expr;
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unsigned use_width = expr->expr_width();
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if (expr->expr_type() == IVL_VT_REAL)
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use_width = 64;
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NetECast*cast = new NetECast('2', expr, use_width,
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expr->has_sign());
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cast->set_line(*expr);
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return cast;
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}
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NetExpr* cast_to_int2(NetExpr*expr, unsigned width)
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NetExpr* cast_to_int2(NetExpr*expr, unsigned width)
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{
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{
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// Special case: The expression is already BOOL
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// Special case: The expression is already BOOL
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@ -80,7 +80,6 @@ extern NetNet*cast_to_real(Design*des, NetScope*scope, NetNet*src);
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extern NetExpr*cast_to_int4(NetExpr*expr, unsigned width);
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extern NetExpr*cast_to_int4(NetExpr*expr, unsigned width);
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extern NetExpr*cast_to_int2(NetExpr*expr, unsigned width);
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extern NetExpr*cast_to_int2(NetExpr*expr, unsigned width);
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extern NetExpr*cast_to_int2(NetExpr*expr);
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extern NetExpr*cast_to_real(NetExpr*expr);
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extern NetExpr*cast_to_real(NetExpr*expr);
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/*
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/*
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